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公开(公告)号:JPS5715463A
公开(公告)日:1982-01-26
申请号:JP7151781
申请日:1981-05-14
Applicant: IBM
Inventor: JIEEMUZU AARU GAADEINAA , SUTANREE AARU MAKAREUITSUKUZU , MAATEIN REBUITSUTSU , JIYOSEFU EFU SHIEPAADO
IPC: H01L27/10 , H01L21/28 , H01L21/3213 , H01L21/8242 , H01L23/532 , H01L27/108 , H01L29/43 , H01L29/78
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公开(公告)号:JPS54144185A
公开(公告)日:1979-11-10
申请号:JP4209579
申请日:1979-04-09
Applicant: IBM
IPC: H01L29/78 , H01L21/3105 , H01L21/321 , H01L21/339 , H01L21/8234 , H01L29/762
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公开(公告)号:JPH0677245A
公开(公告)日:1994-03-18
申请号:JP15181593
申请日:1993-06-23
Applicant: IBM
Inventor: DEEBUITSUDO KATORAA AARUGUREN , JIYATSUKU ON CHIYUU , MAATEIN REBUITSUTSU , POORU ANDORIYUU RONSUHAIMU , MEARII JIYOOZEFU SATSUKAMANGO , DEEBUITSUDO AREN SANDAARANDO
IPC: H01L29/165 , H01L21/331 , H01L29/73 , H01L29/737
Abstract: PURPOSE: To reduce emitter/base leakage and capacitance by providing a layer which includes an emitter/base hetero-junction, having a predetermined concentration profile made of at least one band-gap determining material and which has a specified transistor structure. CONSTITUTION: A base aperture 17 is formed at a position between an isolation trench 11 and an N reach-through region 14. Next, a P SiGe blanket layer 18 to be an intrinsic base and a non-doped Si layer 19 to be an emitter are formed. It is preferred that the P SiGe blanket layer 18 doped at a high concentration be made extremely thin, with a thickness of approximately 30 nm in the base aperture 17. It is also preferable that the P SiGe blanket layer 18 and the non-doped Si layer 19 be formed by a single low-temperature epitaxy method, with the concentration of a dopant and an alloy material being varied. Therefore, these layers can be considered as a single layer. Thus, emitter/base leakage and capacitance can be reduced.
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公开(公告)号:JPH05347314A
公开(公告)日:1993-12-27
申请号:JP34318991
申请日:1991-12-25
Applicant: IBM
Inventor: JIYATSUKU UUN CHIYUU , CHIYANNMIN SHIE , BUIKUTAA AARU NASUTASHI , POORU ANDORIYUU RONSHIEIMU , MAATEIN REBUITSUTSU
IPC: H01L21/225 , H01L21/331 , H01L29/73 , H01L29/732
Abstract: PURPOSE: To form a small doped region, where dopant concentration is appropriately controlled, within a semiconductor substrate. CONSTITUTION: A semiconductor substrate 10 is provided. Then, an epitaxial semiconductor material layer 16, doped in situ at a temperature lower than 700 deg.C, is formed on a to be doped region formation area of the semiconductor substrate. The substrate is heated in a non-oxidizing environment for moving the dopant from the epitaxial layer 16 into the substrate 10, so as to form a doped region 18. Then, the epitaxial semiconductor layer 16 is oxidized at a temperature lower than 650 deg.C, and at least one portion of the oxidized layer is removed such that the doped region 18 is exposed. The obtained doped region is small, and in this region, the dopant concentration is strictly controlled.
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