公开(公告)号：JPH0677245A

公开(公告)日：1994-03-18

申请号：JP15181593

申请日：1993-06-23

Applicant: IBM

Inventor： DEEBUITSUDO KATORAA AARUGUREN ,  JIYATSUKU ON CHIYUU ,  MAATEIN REBUITSUTSU ,  POORU ANDORIYUU RONSUHAIMU ,  MEARII JIYOOZEFU SATSUKAMANGO ,  DEEBUITSUDO AREN SANDAARANDO

IPC: H01L29/165 ,  H01L21/331 ,  H01L29/73 ,  H01L29/737

Abstract: PURPOSE: To reduce emitter/base leakage and capacitance by providing a layer which includes an emitter/base hetero-junction, having a predetermined concentration profile made of at least one band-gap determining material and which has a specified transistor structure. CONSTITUTION: A base aperture 17 is formed at a position between an isolation trench 11 and an N reach-through region 14. Next, a P SiGe blanket layer 18 to be an intrinsic base and a non-doped Si layer 19 to be an emitter are formed. It is preferred that the P SiGe blanket layer 18 doped at a high concentration be made extremely thin, with a thickness of approximately 30 nm in the base aperture 17. It is also preferable that the P SiGe blanket layer 18 and the non-doped Si layer 19 be formed by a single low-temperature epitaxy method, with the concentration of a dopant and an alloy material being varied. Therefore, these layers can be considered as a single layer. Thus, emitter/base leakage and capacitance can be reduced.

公开(公告)号：JPH07307302A

公开(公告)日：1995-11-21

申请号：JP9711195

申请日：1995-04-21

Applicant: IBM

Inventor： SHIRIRU KABURARU JIYUNIA ,  KEBUIN KOKU CHIYAN ,  JIYATSUKU ON CHIYUU ,  JIEEMUZU MATSUKERU EDOUIN HAAP

IPC: C30B29/06 ,  C23C14/08 ,  C23C16/04 ,  H01L21/20 ,  H01L21/203 ,  H01L21/205

Abstract: PURPOSE: To grow the epitaxial layer of silicon or silicon alloy selectively on a semiconductor substrate at relatively low temperature, by growing the epitaxial layer on the substrate after forming the mask layer of the oxide of a specified element. CONSTITUTION: The film mask 11 of the oxide of an element being selected from the group of scandium, yttrium, lanthanum, cerium, praseodymium, neodymium, samarium, europium, cadmium, terbium, dysprosium, holmium, erbium, thulium, ytterbium, and lutetium is made on a wafer 10. The adhesion of the oxide is performed by sputtering. Next, an epitaxial layer 12 of silicon or the like is grown on the wafer 10, using the patterned oxide mask layer 11. At that time, the epitaxial layer 12 is grown on the wafer 10 at a temperature lower than 650 deg.C, but it is not grown on the mask layer 11.