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公开(公告)号:DE69031547T2
公开(公告)日:1998-03-26
申请号:DE69031547
申请日:1990-05-31
Applicant: IBM
Inventor: BONEVENTO FRANCIS MICHAEL , CHISHOLM DOUGLAS RODERICK , DODDS SAMMY DAVIS , DESAI DHRUVKUMAR M , MANDESE ERNEST NELSON
IPC: G06F13/12
Abstract: A Command interface includes ports for transferring information between a host processor and at least one intelligent subsystem which may have attached devices. A Command Interface port receives either a direct command or an indirect command from the host processor, which commands are indicative of a type of operation to be performed by the one subsystem or an attached device. An Attention port receives a code from the host processor which is indicative of which one of the direct command or the indirect command is received at the Command Interface port, and which is also indicative of which of the one intelligent subsystem or a device is to execute the command. A command busy/status port receives a code from the one intelligent subsystem which is indicative of whether or not the Command Interface port and the Attention port are busy, and whether or not the one intelligent subsystem is accepting or rejecting commands. The host processor can read this port without altering or updating the code.
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公开(公告)号:PE3691A1
公开(公告)日:1991-02-15
申请号:PE17079390
申请日:1990-06-14
Applicant: IBM
Inventor: HEATH CHESTER ASBURY , MENDELSON RICHARD NEIL , BONEVENTO FRANCIS MICHAEL , MANDESE ERNEST NELSON
Abstract: CARACTERIZADA POR ESTAR REFERIDA A LA GESTION DE MULTIPLES INTERRUPCIONES LOGICAS DE COMANDOS INDIRECTOS EN UNA INTERRUPCION FISICA DESDE UN SUBSISTEMA A UN PROCESADOR CENTRAL. EL PROCESADOR CENTRAL PUEDE BORRAR MULTIPLES INTERRUPCIONES LOGICAS DESDE UN DISPOSITIVO LOGICO, DADO EN EL SUBSISTEMA CON UN SOLO COMANDO DE REINICIALIZACION DE INTERRUPCIONES
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公开(公告)号:AU630699B2
公开(公告)日:1992-11-05
申请号:AU5597890
申请日:1990-05-25
Applicant: IBM
Inventor: BONEVENTO FRANCIS MICHAEL , CHISHOLM DOUGLAS RODERICK , DODDS SAMMY DAVIS , DESAI DHRUVKUMAR M , MANDESE ERNEST NELSON , MCNEILL ANDREW BOYCE , MENDELSON RICHARD NEIL
Abstract: A Command interface includes ports for transferring information between a host processor and at least one intelligent subsystem which may have attached devices. A Command Interface port receives either a direct command or an indirect command from the host processor, which commands are indicative of a type of operation to be performed by the one subsystem or an attached device. An Attention port receives a code from the host processor which is indicative of which one of the direct command or the indirect command is received at the Command Interface port, and which is also indicative of which of the one intelligent subsystem or a device is to execute the command. A command busy/status port receives a code from the one intelligent subsystem which is indicative of whether or not the Command Interface port and the Attention port are busy, and whether or not the one intelligent subsystem is accepting or rejecting commands. The host processor can read this port without altering or updating the code.
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公开(公告)号:BR9002835A
公开(公告)日:1991-08-20
申请号:BR9002835
申请日:1990-06-15
Applicant: IBM
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公开(公告)号:CA2161460A1
公开(公告)日:1990-12-10
申请号:CA2161460
申请日:1990-03-16
Applicant: IBM
Inventor: BENEVENTO FRANCIS MICHAEL , CHILSHOLM DOUGLAS RODERICK , DODDS SAMMY DAVIS , DESAI DHRUVKUMAR M , MANDESE ERNEST NELSON , MCNEILL ANDREW BOYCE , MENDELSON RICHARD NEIL
IPC: G06F13/14
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公开(公告)号:DE69122937T2
公开(公告)日:1997-05-07
申请号:DE69122937
申请日:1991-07-18
Applicant: IBM
IPC: G06F13/24
Abstract: This disclosure relates to personal computer systems, and more particularly to a personal computer which provides for interrupt redirection of the activity of a microprocessor. The personal computer system has a multichannel bus for transferring data, a microprocessor for manipulating data and coupled to the bus, and a plurality of input/output devices coupled to the bus for receiving and delivering data for manipulation by the microprocessor. Each input/output device is capable of generating a logical interrupt signal indicative of a request for access to the microprocessor and of being remotely reset to a non-interrupt condition, and all of the devices deliver their logical interrupt signals through a common physical channel of the bus. An interrupt controller is coupled to the microprocessor and bus for recognising delivery of an interrupt signal and for periodically generating an interrupt reset signal and delivering reset signals to all of the input/output devices simultaneously for setting all of the devices to a condition indicative of no request for access to said microprocessor.
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公开(公告)号:NZ233824A
公开(公告)日:1992-09-25
申请号:NZ23382490
申请日:1990-05-25
Applicant: IBM
Inventor: BONEVENTO FRANCIS MICHAEL , CHISHOLM DOUGLAS RODERICK , DODDS SAMMY DAVIS , DESAI DHRUVKUMAR M , MANDESE ERNEST NELSON , MCNEILL ANDREW BOYCE , MENDELSON RICHARD NEIL
Abstract: A Command interface includes ports for transferring information between a host processor and at least one intelligent subsystem which may have attached devices. A Command Interface port receives either a direct command or an indirect command from the host processor, which commands are indicative of a type of operation to be performed by the one subsystem or an attached device. An Attention port receives a code from the host processor which is indicative of which one of the direct command or the indirect command is received at the Command Interface port, and which is also indicative of which of the one intelligent subsystem or a device is to execute the command. A command busy/status port receives a code from the one intelligent subsystem which is indicative of whether or not the Command Interface port and the Attention port are busy, and whether or not the one intelligent subsystem is accepting or rejecting commands. The host processor can read this port without altering or updating the code.
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公开(公告)号:PE34890A1
公开(公告)日:1991-01-18
申请号:PE17020090
申请日:1990-05-31
Applicant: IBM
Inventor: DODDS SAMMY DAVIS , BONEVENTO FRANCIS MICHAEL , CHISHOLM DOUGLAS RODERICK , MENDELSON RICHARD NEIL , DESAI DHRUVKUMAR M , MANDESE ERNEST NELSON , MCNEILL ANDREW BOYCE
Abstract: CARACTERIZADO PORQUE ESTA DIRIGIDO AL SUMINISTRO DE COMANDOS DESDE UN MECANISMO DE LA CLASE DE LAS COMPUTADORAS PERSONALES A UNA PLURALIDAD DE SISTEMAS INTELIGENTES A LOS QUE PUEDEN ENCONTRARSE AGREGADOS OTROS DISPOSITIVOS. LA INTERFASE DE COMANDOS INCLUYE UNA PORTEZUELA DE INTERFASE DE COMANDO, UNA PORTEZUELA DE ATENCION Y UNA PORTEZUELA DE ESTADO/COMANDO OCUPADO
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公开(公告)号:CA2161460C
公开(公告)日:1999-05-11
申请号:CA2161460
申请日:1990-03-16
Applicant: IBM
Inventor: BENEVENTO FRANCIS MICHAEL , CHILSHOLM DOUGLAS RODERICK , MANDESE ERNEST NELSON , MCNEILL ANDREW BOYCE , MENDELSON RICHARD NEIL , DODDS SAMMY DAVIS , DESAI DHRUVKUMAR M
IPC: G06F13/14
Abstract: A Command interface includes ports for transferring information between a host processor and at least one intelligent subsystem which may have attached devices. A Command interface port receives either a direct command or an indirect command from the host processor, which commands are indicative of a type of operation to be performed by the one subsystem or an attached device. An Attention port receives a code from the host processor which is indicative of which one of the direct command or the indirect command is received at the Command Interface port, and which is also indicative of which of the one intelligent subsystem or a device is to execute the command. A command busy/status port receives a code from the one intelligent subsystem which is indicative of whether or not the Command Interface port and the Attention port are busy, and whether or not the one intelligent subsystem is accepting or rejecting commands. The host processor can read this port without altering or updating the code.
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公开(公告)号:CA2012400C
公开(公告)日:1999-03-30
申请号:CA2012400
申请日:1990-03-16
Applicant: IBM
Inventor: CHISHOLM DOUGLAS RODERICK , BONEVENTO FRANCIS MICHAEL , MENDELSON RICHARD NEIL , MCNEILL ANDREW BOYCE , MANDESE ERNEST NELSON , DESAI DHRUVKUMAR M , DODDS SAMMY DAVIDS
Abstract: A Command interface includes ports for transferring information between a host processor and at least one intelligent subsystem which may have attached devices. A Command Interface port receives either a direct command or an indirect command from the host processor, which commands are indicative of a type of operation to be performed by the one subsystem or an attached device. An Attention port receives a code from the host processor which is indicative of which one of the direct command or the indirect command is received at the Command Interface port, and which is also indicative of which of the one intelligent subsystem or a device is to execute the command. A command busy/status port receives a code from the one intelligent subsystem which is indicative of whether or not the Command Interface port and the Attention port are busy, and whether or not the one intelligent subsystem is accepting or rejecting commands. The host processor can read this port without altering or updating the code.
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