公开(公告)号：BR7708707A

公开(公告)日：1979-07-24

申请号：BR7708707

申请日：1977-12-28

Applicant: IBM

Inventor： HOOD R ,  DAVIS M ,  MAYES G

IPC: G06F9/305 ,  G06F9/34 ,  G06F12/04 ,  G06F3/00

Abstract: A method of accessing variable-length bit fields in the memory of an electronic data processing system irrespective of the relationship between the boundaries of addressable elements within said memory and the start and end of the bit fields comprising the operations of: setting the initial values of a base register within said system to contain a representation of a base address of an addressable element; setting the initial values of a shift register within said system to contain a representation of the offset in said memory of the beginning of a particular bit field from said base address; combining the contents of said base and offset registers in such a way as to provide a representation of the position in said memory of the first bit of said particular bit field; create a single instruction that contains a representation of the length of said particular bit field. (Machine-translation by Google Translate, not legally binding)

公开(公告)号：BR7702422A

公开(公告)日：1978-01-17

申请号：BR7702422

申请日：1977-04-15

Applicant: IBM

Inventor： DAVIS M ,  MAYES G ,  MODERMOTT T

IPC: G06F9/40 ,  G06F9/42 ,  G06F9/12

Abstract: A data processing system is described wherein, during linkage to a subroutine, by a single machine instruction, a complete status save and the assignment of a dynamic work area are effected. By another single machine instruction the process is reversed. The elements of the complete machine status and the dynamic work area are retained in a hardware controlled stack, thus permitting nesting of the subroutine calls.