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公开(公告)号：US3825902A
公开(公告)日：1974-07-23
申请号：US35601473
申请日：1973-04-30
Applicant: IBM
Inventor： BROWN W , DAVIS M , PIPITONE R
CPC classification number: G06F9/461
Abstract: A data processor has multiple sets of hardware each of which is capable of autonomously controlling a common storage and common logical control circuits to execute a program. The hardware sets are allocated priority levels and are preferentially employed for handling interrupt service requests. Any hardware set which is interrupted in processing by a higher priority input request retains its processing status and resumes processing when control of the common elements is returned to it. Apparatus is included for addressing the set associated with a different priority level than the current level so that this different level can be preempted for another task. The presence of an interrupted program in the preempted level can be detected and its critical status stored for restoration after completion of the preempting program.
Abstract translation: 数据处理器具有多组硬件，每组硬件能够自主地控制公共存储器和公共逻辑控制电路来执行程序。 硬件组被分配优先级，优先用于处理中断服务请求。 通过较高优先级输入请求处理中断的任何硬件组保留其处理状态，并且当共同元素的控制返回给它时恢复处理。 包括用于寻址与不同于当前级别的优先级相关联的设备的装置，以便可以为另一任务抢占该不同的级别。 可以检测到抢占级别的中断程序的存在，并且在完成抢占程序之后存储用于恢复的关键状态。
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公开(公告)号：BR7702780A
公开(公告)日：1978-02-21
申请号：BR7702780
申请日：1977-04-27
Applicant: IBM
Abstract: System mode controls for obtaining limited addressability for supervisor programming operations without disturbing a user address key currently contained in a user key register (UKR).
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公开(公告)号：DE60109170D1
公开(公告)日：2005-04-07
申请号：DE60109170
申请日：2001-06-29
Applicant: IBM
Inventor： CHEN SHYNG-TSONG , DAVIS M , RODBELL P
Abstract: Grooves are formed in a CMP pad by positioning the pad on a supporting surface with a working surface of the pad in spaced relation opposite to a router bit and at least one projecting stop member adjacent to the router bit, an outer end portion of the bit projecting beyond the stop. When the bit is rotated, relative axial movement between the bit and the pad causes the outer end portion of the bit to cut an initial recess in the pad. Relative lateral movement between the rotating bit and the pad then forms a groove which extends laterally away from the recess and has a depth substantially the same as that of the recess. The depths of the initial recess and the groove are limited by applying a vacuum to the working surface of the pad to keep it in contact with the stop member(s). Different lateral movements between the bit and the pad are used to form a variety of groove patterns, the depths of which are precisely controlled by the stop member(s). The grooves may be formed in the polishing surface and/or the rear opposite surface of the pad and passages may be provided for interconnecting the rear grooves with the polishing surface or the front grooves.
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公开(公告)号：BR7403530D0
公开(公告)日：1974-11-19
申请号：BR353074
申请日：1974-04-30
Applicant: IBM
Inventor： PIPITONE R , BROWN W , DAVIS M
Abstract: A data processor has multiple sets of hardware each of which is capable of autonomously controlling a common storage and common logical control circuits to execute a program. The hardware sets are allocated priority levels and are preferentially employed for handling interrupt service requests. Any hardware set which is interrupted in processing by a higher priority input request retains its processing status and resumes processing when control of the common elements is returned to it. Apparatus is included for addressing the set associated with a different priority level than the current level so that this different level can be preempted for another task. The presence of an interrupted program in the preempted level can be detected and its critical status stored for restoration after completion of the preempting program.
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Patent Agency Ranking
公开(公告)号：DE60114201D1
公开(公告)日：2006-03-02
申请号：DE60114201
申请日：2001-06-27
Applicant: IBM , FREUDENBERG NON WOVENS LOWELL
Inventor： CHEN SHYNG-TSONG , CHUNG SIU , DAVIS M , HSU KAI , RODBELL P
Abstract: Grooves are formed in a COD pad by positioning the pad on a supporting surface with a working surface of the pad in spaced relation opposite to a router bit and at least one projecting stop member adjacent to the router bit, an outer end portion of the bit projecting beyond the stop. When the bit is rotated, relative axial movement between the bit and the pad causes the outer end portion of the bit to cut an initial recess in the pad. Relative lateral movement between the rotating bit and the pad then forms a groove which extends laterally away from the recess and has a depth substantially the same as that of the recess. The depths of the initial recess and the groove are limited by applying a vacuum to the working surface of the pad to keep it in contact with the stop member(s). Different lateral movements between the bit and the pad are used to form a variety of groove patterns, the depths of which are precisely controlled by the stop member(s).
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公开(公告)号：BR7708707A
公开(公告)日：1979-07-24
申请号：BR7708707
申请日：1977-12-28
Applicant: IBM
Abstract: A method of accessing variable-length bit fields in the memory of an electronic data processing system irrespective of the relationship between the boundaries of addressable elements within said memory and the start and end of the bit fields comprising the operations of: setting the initial values of a base register within said system to contain a representation of a base address of an addressable element; setting the initial values of a shift register within said system to contain a representation of the offset in said memory of the beginning of a particular bit field from said base address; combining the contents of said base and offset registers in such a way as to provide a representation of the position in said memory of the first bit of said particular bit field; create a single instruction that contains a representation of the length of said particular bit field. (Machine-translation by Google Translate, not legally binding)
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公开(公告)号：BR7702823A
公开(公告)日：1978-04-04
申请号：BR7702823
申请日：1977-05-02
Applicant: IBM
Inventor： DAVIS M , BOUKNECHT M , VARGARI L
Abstract: A peripheral device control unit with improved input-output coupling logic circuits for use in a data processing system including a central computer unit, a memory unit, input-output control logic circuits and a line general coupling having a plurality of lines for interconnecting the units in parallel. (Machine-translation by Google Translate, not legally binding)
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公开(公告)号：BR7702776A
公开(公告)日：1978-02-21
申请号：BR7702776
申请日：1977-04-29
Applicant: IBM
Inventor： BIRNEY R , GRAYBIEL L , DAVIS M
Abstract: The disclosure describes instruction operated controls for loading or storing address key values into or from one or more address key register sections in a key-register-controlled addressing system. The controls load or store one or all key register sections of an address key register (AKR) in a processor from or to a word in either a main memory or a general purpose register (GPR). Both the load or store controls are operated by the same instruction format, in which one field indicates whether the operation is to be a load or store of the designated AKR section(s). Another field designates one AKR section, or all AKR sections, which are to be loaded or stored. A still further field designates whether the operation is to be from or to main memory or a GPR. The disclosure provides circuits which operate with microcode to perform these operations.
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