公开(公告)号：BR7702422A

公开(公告)日：1978-01-17

申请号：BR7702422

申请日：1977-04-15

Applicant: IBM

Inventor： DAVIS M ,  MAYES G ,  MODERMOTT T

IPC: G06F9/40 ,  G06F9/42 ,  G06F9/12

Abstract: A data processing system is described wherein, during linkage to a subroutine, by a single machine instruction, a complete status save and the assignment of a dynamic work area are effected. By another single machine instruction the process is reversed. The elements of the complete machine status and the dynamic work area are retained in a hardware controlled stack, thus permitting nesting of the subroutine calls.