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    Yield optimization in router for systematic defect
    2.
    发明专利
    Yield optimization in router for systematic defect 有权
    系统缺陷路由器的优化优化

    公开(公告)号：JP2007311773A

    公开(公告)日：2007-11-29

    申请号：JP2007101249

    申请日：2007-04-09

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： BICKFORD JEANNE P ,  BUEHLER MARKUS ,  HIBBELER JASON D ,  KOEHL JUERGEN ,  MAYNARD DANIEL N

    IPC: H01L21/82 ,  H01L21/66

    CPC classification number: G06F17/5077

    Abstract: PROBLEM TO BE SOLVED: To provide a method which optimize router settings so as to improve IC yield, and to provide a computer program product. SOLUTION: Yield data in an IC manufacturing line are reviewed so as to identify structure-specific mechanisms that impact the IC yield. Next, with respect to each structure-specific mechanism, a structural identifier including a wire code, a tag and/or unique identifiers is established. With respect to a wire having different width, the structural identifier is established. Subsequently, the weighting factor is established for each structure-specific mechanism in such a way that a higher weighting factor is established with respect to a structure-specific mechanism including a thick wire which is the most proximate to multiple thick wires. The structural identifier and the weighting factor with respect to the spacing produced between single width lines, double width lines, and triple width lines and wires arranged on a large metal land. Then, the router settings are modified based on the structural identifier and the weighting factor so as to minimize systematic defects. COPYRIGHT: (C)2008,JPO&INPIT

    Abstract translation: 要解决的问题：提供一种优化路由器设置以提高IC产量并提供计算机程序产品的方法。 解决方案：审查IC生产线中的产量数据，以便识别影响IC产量的结构特异性机制。 接下来，关于每个结构特定机制，建立包括有线代码，标签和/或唯一标识符的结构标识符。 对于具有不同宽度的导线，建立了结构标识符。 随后，针对每个结构特定机构建立加权因子，使得相对于包括最接近多个粗线的粗线的结构特定机构建立较高的加权因子。 单个宽度线，双宽度线和三条宽度线之间产生的间距的结构标识符和加权因子以及排列在大金属地面上的导线。 然后，基于结构标识符和权重因子修改路由器设置，以便最小化系统缺陷。 版权所有（C）2008，JPO＆INPIT

    Image sensor pixel structure employing a shared floating diffusion
    4.
    发明专利
    Image sensor pixel structure employing a shared floating diffusion 未知

    公开(公告)号：GB2484448A

    公开(公告)日：2012-04-11

    申请号：GB201202317

    申请日：2010-06-01

    Applicant: IBM

    Inventor： HIBBELER JASON ,  MAYNARD DANIEL N ,  OGG KEVIN N ,  RASSEL RICHARD J

    IPC: H01L27/146 ,  H04N5/3745

    Abstract: A pixel structure for an image sensor includes a semiconductor material portion (30) having a coplanar and contiguous semiconductor surface and including four photodiodes (30A, 30B, 30C, 30D), four channel regions (31A, 31B, 31C, 31D), and a common floating diffusion region (32). Each of the four channel regions is directly adjoined to one of the four photodiodes and the common floating diffusion region. The four photodiodes are located within four different quadrants (1Q_O1, 2Q-01, 3Q_01, 4Q_01) as defined employing a vertical line passing through a point (01) within the common floating diffusion region as a center axis. The common floating diffusion region, a reset gate transistor (RG), a source follower transistor (SF), and a row select transistor (RS) are located within four different quadrants (1Q_O2, 2Q_02, 3Q_02, 4Q_02) as defined employing a vertical line passing through a point (02) within one of the photodiodes (30A) as an axis.

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