公开(公告)号：JPH10107066A

公开(公告)日：1998-04-24

申请号：JP25532197

申请日：1997-09-19

Applicant: IBM

Inventor： DANIEL GEORGE BERGER ,  GUY PAUL BREULETTE ,  DAVID HERSH DANOVICI ,  PETER ALFRED GRUBER ,  BRUCE LEE HUMPHREY ,  MICHAEL LIER ,  WILLIAM THOMAS MOTSCHIF ,  CARLOS JUAN SAMBUSETTI

IPC: B23K35/26 ,  H01L21/60 ,  H05K3/34

Abstract: PROBLEM TO BE SOLVED: To provide a method for forming an interconnecting section on an electronic device. SOLUTION: The very small recessed sections of a molding tool 10 having the recessed sections are filled up with molten solder 22 by making the solder 22 to flow and the solder 22 is solidified. Then the tool 10 is aligned with a wafer 30 carrying chips to which solder bumps 40 having a high melting point are stuck. Consequently, each very small recessed section of the tool 10 is aligned with the solder bump 40 on each chip. After alignment, the solder in the recessed sections are transferred to the top sections of the solder bumps 40 by passing an aligned molding tool 10/wafer assembly 50 through a reflow furnace. Therefore, two-layer metallic composition bumps are formed of the two kinds of different solder alloys.