公开(公告)号：CA1035051A

公开(公告)日：1978-07-18

申请号：CA232796

申请日：1975-07-31

Applicant: IBM

Inventor： BLUM ARNOLD ,  HAJDU JOHANN ,  MOHR CLAUS ,  REICHL LEOPOLD ,  SONNTAG GUENTHER

IPC: G06F9/22 ,  G06F13/12 ,  G06F13/14 ,  G06F15/16 ,  G06F15/78

Abstract: Input/output registers integrated with logic and arithmetic circuits are combined externally of a processor nucleus having only storage registers, instruction decode logic, timing circuitry and arithmetic and logic unit for executing microinstructions whereby the use of the input/output registers is determined by microprogram code and by time control to either selectively execute all adapter and interface communication and control functions for input and output devices or to selectively be switched into the data flow of the processor nucleus.