公开(公告)号：CA1048646A

公开(公告)日：1979-02-13

申请号：CA239232

申请日：1975-11-04

Applicant: IBM

Inventor： HURLEY WILLIAM J ,  MUHLFELD HANS P

IPC: G01R31/3185 ,  G11C29/48 ,  G11C29/00 ,  G01R15/12

Abstract: TESTING EMBEDDED ARRAYS A large scale integrated (LSI) chip or semiconductor device includes a memory array and associated logic circuitry. The array is "embedded" in the sense that it is not directly accessible, either in whole or in part, from the input and output terminals or pads of the device. To facilitate testing there is added to the device gating means to the memory array and wiring extending from primary access points of the device to the memory array bypassing and in parallel with the logic circuitry. The device further includes control means operatively associated with the gating means for switching the input to the array between the logic circuitry and the primary access points. In the latter condition direct access to the array is permitted, thereby facilitating testing.

公开(公告)号：FR2295529A1

公开(公告)日：1976-07-16

申请号：FR7533272

申请日：1975-10-20

Applicant: IBM

Inventor： HURLEY WILLIAM J ,  MUHLFELD HANS P

IPC: G01R31/3185 ,  G11C29/48 ,  G11C29/00

Abstract: A large scale integrated (LSI) chip or semiconductor device includes a memory array and associated logic circuitry. The array is "embedded" in the sense that it is not directly accessible, either in whole or in part, from the input and output terminals or pads of the device. To facilitate testing there is added to the device gating means to the memory array and wiring extending from primary access points of the device to the memory array bypassing and in parallel with the logic circuitry. The device further includes control means operatively associated with the gating means for switching the input to the array between the logic circuitry and the primary access points. In the latter condition direct access to the array is permitted, thereby facilitating testing.

公开(公告)号：DE3472839D1

公开(公告)日：1988-08-25

申请号：DE3472839

申请日：1984-11-14

Applicant: IBM

Inventor： CHANG YI-HUA E ,  GRUODIS ALGIRDAS J ,  MUHLFELD HANS P ,  RODRIGUEZ CHARLES W ,  SHULMAN MARK L

IPC: H01L21/66 ,  G01R31/3183 ,  G01R31/319 ,  G01R31/3193 ,  G11C29/36 ,  G11C29/56 ,  G01R31/28

公开(公告)号：DE2555435A1

公开(公告)日：1976-06-24

申请号：DE2555435

申请日：1975-12-10

Applicant: IBM

Inventor： HURLEY WILLIAM J ,  MUHLFELD HANS P

IPC: G01R31/3185 ,  G11C29/48 ,  G11C29/00 ,  G01R31/28 ,  H01L27/04

Abstract: A large scale integrated (LSI) chip or semiconductor device includes a memory array and associated logic circuitry. The array is "embedded" in the sense that it is not directly accessible, either in whole or in part, from the input and output terminals or pads of the device. To facilitate testing there is added to the device gating means to the memory array and wiring extending from primary access points of the device to the memory array bypassing and in parallel with the logic circuitry. The device further includes control means operatively associated with the gating means for switching the input to the array between the logic circuitry and the primary access points. In the latter condition direct access to the array is permitted, thereby facilitating testing.