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    HIGH DENSITY SEMICONDUCTOR CIRCUIT LAYOUT
    9.
    发明专利
    HIGH DENSITY SEMICONDUCTOR CIRCUIT LAYOUT 未知

    公开(公告)号：CA1064624A

    公开(公告)日：1979-10-16

    申请号：CA268098

    申请日：1976-12-17

    Applicant: IBM

    Inventor： BALYOZ JOHN ,  GRUODIS ALGIRDAS J ,  JEN TEH-SEN ,  MIKHAIL WADIE F

    IPC: H01L27/082 ,  H01L21/82 ,  H01L21/8226 ,  H01L23/528 ,  H01L27/10 ,  H01L27/118 ,  H03K19/084 ,  H03K19/088 ,  H03K19/091 ,  H01L23/48 ,  H01L29/44 ,  H01L29/52

    Abstract: HIGH DENSITY SEMICONDUCTOR CIRCUIT LAYOUT An integrated logic circuit having a novel layout in a semiconductor substrate. The area required for the circuits within the substrate is substantially less than that of prior layouts. Each circuit includes a first device including an elongated impurity region and a set of other impurity regions either in, or in contiguous relationship with, the elongated region; to form a set of diode junctions. The elongated region is capable of containing a predetermined maximum number of the other impurity regions. A second device is located adjacent the narrow side of said first device. A first set of first level conductors extends over the elongated region orthogonally with respect to the elongated direction and are interconnected to selected ones of the other impurity regions. Another conductor is a second level atop the substrate is connected to an impurity region of the second device and extends substantially parallel to the elongated direction. For the most part, this conductor connects the second device with one of the conductors in the first set. The reference potential connections to each circuit are also made preferably by conductive channels running in the same direction. With respect to chip architecture, each logic circuit is of substantially identical identical geometric form and arranged in columnar arrays.

    HIGH RESOLUTION PROGRAMMABLE PULSE GENERATOR
    10.
    发明专利
    HIGH RESOLUTION PROGRAMMABLE PULSE GENERATOR 未知

    公开(公告)号：CA2109042A1

    公开(公告)日：1994-06-05

    申请号：CA2109042

    申请日：1993-10-22

    Applicant: IBM

    Inventor： DICKOL JOHN E ,  DO DINH L ,  GRUODIS ALGIRDAS J

    IPC: G01R31/3183 ,  G01R31/319 ,  G06F1/10 ,  H03K5/00 ,  H03K5/13 ,  H03K5/135

    Abstract: A HIGH RESOLUTION PROGRAMMABLE PULSE GENERATOR A programmable pulse generator that uses high resolution programmable delay circuits (HRPDCs) as building blocks, each of which is capable of changing timing "on-the-fly", i.e., modifying the programmable delay within one tester cycle and without the limitations of existing delay circuits. The pulse generator comprises a timing control array that is subdivided into three components providing coarse delay, fine delay and extra-fine delay; a plurality of timing generators respectively controlled by the timing control array, each generator further comprising a plurality of HRPDCs, programmable delay circuits, and fixed delay blocks appropriately combined to modify pulse delay and pulse edges within each cycle.

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