公开(公告)号：DE68919211D1

公开(公告)日：1994-12-08

申请号：DE68919211

申请日：1989-03-29

Applicant: IBM

Inventor： LEE ADRIAN CHARLES FREDERICK ,  WALLIS CHRISTOPHER NORMAN ,  MURFET PHILIP JOHN ,  FURNISS STEPHEN ,  WINLOW THOMAS ,  PALMER MICHAEL JOHN

IPC: H04L7/10 ,  G06F5/08 ,  H03M9/00 ,  H04L7/00 ,  H04L7/033 ,  H04L7/04 ,  H04L25/06 ,  H04L25/38

Abstract: An asynchronous serial data receiver for receiving a stream of data bits, characterised by a plurality of shift registers (54) into which samples corresponding to points within said data bit stream are read, different shift registers (54) holding a different set of said samples, said points being separated by most one half of a data bit period, and a decoder (60-90) responsive to said samples held in said shift registers (54) for recognising points of known phase within said data assessed relative to which samples which corresponding to points within said data bits may be identified for reading. The invention provides a high speed serial receiver which is particularly suitable for use within disc drives and data storage and retrieval systems in general. The serial data receiver of the present invention does not require a clock synchronised with the incoming data. Furthermore the serial data receiver is able to share the sampling of the data bit stream between a plurality of shift registers (54) none of which need be clock more than once per data bit period.

公开(公告)号：DE68919211T2

公开(公告)日：1995-05-11

申请号：DE68919211

申请日：1989-03-29

Applicant: IBM

Inventor： LEE ADRIAN CHARLES FREDERICK ,  WALLIS CHRISTOPHER NORMAN ,  MURFET PHILIP JOHN ,  FURNISS STEPHEN ,  WINLOW THOMAS ,  PALMER MICHAEL JOHN

IPC: H04L7/10 ,  G06F5/08 ,  H03M9/00 ,  H04L7/00 ,  H04L7/033 ,  H04L7/04 ,  H04L25/06 ,  H04L25/38

Abstract: An asynchronous serial data receiver for receiving a stream of data bits, characterised by a plurality of shift registers (54) into which samples corresponding to points within said data bit stream are read, different shift registers (54) holding a different set of said samples, said points being separated by most one half of a data bit period, and a decoder (60-90) responsive to said samples held in said shift registers (54) for recognising points of known phase within said data assessed relative to which samples which corresponding to points within said data bits may be identified for reading. The invention provides a high speed serial receiver which is particularly suitable for use within disc drives and data storage and retrieval systems in general. The serial data receiver of the present invention does not require a clock synchronised with the incoming data. Furthermore the serial data receiver is able to share the sampling of the data bit stream between a plurality of shift registers (54) none of which need be clock more than once per data bit period.