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    Fast data back-up and restore between volatile and flash memory
    2.
    发明专利
    Fast data back-up and restore between volatile and flash memory 未知

    公开(公告)号：GB2517435A

    公开(公告)日：2015-02-25

    申请号：GB201314810

    申请日：2013-08-19

    Applicant: IBM

    Inventor： PALMER MICHAEL JOHN ,  WONG KELVIN

    IPC: G06F11/10 ,  G06F12/02

    Abstract: Memory controller 1000 backs-up stripes of data to a flash memory system. The system comprises channels, e.g. flash devices, divided into dies, each having two planes, where each plane includes blocks, and where each block comprises a number of pages for data payload. Stripes are sets of pages across all available channels, dies, and planes having the same block and page addresses. Each stripe further comprises first metadata indicating known bad blocks. Grown bad block component 1034 determines when an error occurs in a block of flash memory during back-up. Component 1034 rewrites the stripes to exclude block with errors and embeds second metadata with locations of newly discovered bad blocks. After checking first and second metadata, component 1034 writes to more planes simultaneously if no bad bock indication is given. By flagging new bad-block locations, time is not wasted erasing blocks when new bad-blocks are encountered at back-up.

    3.
    发明专利
    未知

    公开(公告)号：DE69332196T2

    公开(公告)日：2003-05-15

    申请号：DE69332196

    申请日：1993-03-22

    Applicant: IBM

    Inventor： FERENCE THOMAS GEORGE ,  GRUBER PETER ALFRED ,  HERNANDEZ BERNARDO ,  PALMER MICHAEL JOHN ,  ZINGHER ARTHUR RICHARD

    IPC: B23K3/00 ,  B23K1/20 ,  B23K3/06 ,  B29C45/00 ,  H05K3/34 ,  H01L21/48 ,  H01L21/00

    Abstract: An apparatus and method are described for injection molding solder mounds onto electronic devices. The apparatus has a reservoir (46) for molten solder which is disposed over a cavity in an injection plate (34). The injection plate is disposed over a mold (32) having an array of cavities therein into which solder is injection molded. The mold is disposed over a workpiece (50), such as a semiconductor chip or a semiconductor chip packaging substrate. The cavities in the mold are aligned with electrical contact locations on the chip or substrate. The workpiece is heated and the molten solder is forced under gas pressure into the cavity (68) in the injection plate (34) disposed above the array of cavities in the mold. The molten solder is forced into the array of cavities in the mold. The injection plate (34) is advanced to slide over the mold to wipe away the excess solder above the mold at a plurality of wiping apertures in the injection plate. The injection plate is further advanced to a location having a nonsolder wettable surface at which location the injection plate is removed. The mold is then removed to leave solder mounds disposed on the workpiece. The workpiece can be a semiconductor chip, a semiconductor chip packaging substrate or a dummy substrate onto which the injected molded solder adheres such as a polymer layer to form a carrier substrate for a solder mound array which can be subsequently transferred to a substrate such as a semiconductor chip or a semiconductor chip packaging substrate. The apparatus and methods of the present invention can be integrated into an automated manufacturing system for depositing an array of solder mounds onto a substrates.

    4.
    发明专利
    未知

    公开(公告)号：DE68919211D1

    公开(公告)日：1994-12-08

    申请号：DE68919211

    申请日：1989-03-29

    Applicant: IBM

    Inventor： LEE ADRIAN CHARLES FREDERICK ,  WALLIS CHRISTOPHER NORMAN ,  MURFET PHILIP JOHN ,  FURNISS STEPHEN ,  WINLOW THOMAS ,  PALMER MICHAEL JOHN

    IPC: H04L7/10 ,  G06F5/08 ,  H03M9/00 ,  H04L7/00 ,  H04L7/033 ,  H04L7/04 ,  H04L25/06 ,  H04L25/38

    Abstract: An asynchronous serial data receiver for receiving a stream of data bits, characterised by a plurality of shift registers (54) into which samples corresponding to points within said data bit stream are read, different shift registers (54) holding a different set of said samples, said points being separated by most one half of a data bit period, and a decoder (60-90) responsive to said samples held in said shift registers (54) for recognising points of known phase within said data assessed relative to which samples which corresponding to points within said data bits may be identified for reading. The invention provides a high speed serial receiver which is particularly suitable for use within disc drives and data storage and retrieval systems in general. The serial data receiver of the present invention does not require a clock synchronised with the incoming data. Furthermore the serial data receiver is able to share the sampling of the data bit stream between a plurality of shift registers (54) none of which need be clock more than once per data bit period.

    5.
    发明专利
    未知

    公开(公告)号：DE68919211T2

    公开(公告)日：1995-05-11

    申请号：DE68919211

    申请日：1989-03-29

    Applicant: IBM

    Inventor： LEE ADRIAN CHARLES FREDERICK ,  WALLIS CHRISTOPHER NORMAN ,  MURFET PHILIP JOHN ,  FURNISS STEPHEN ,  WINLOW THOMAS ,  PALMER MICHAEL JOHN

    IPC: H04L7/10 ,  G06F5/08 ,  H03M9/00 ,  H04L7/00 ,  H04L7/033 ,  H04L7/04 ,  H04L25/06 ,  H04L25/38

    Abstract: An asynchronous serial data receiver for receiving a stream of data bits, characterised by a plurality of shift registers (54) into which samples corresponding to points within said data bit stream are read, different shift registers (54) holding a different set of said samples, said points being separated by most one half of a data bit period, and a decoder (60-90) responsive to said samples held in said shift registers (54) for recognising points of known phase within said data assessed relative to which samples which corresponding to points within said data bits may be identified for reading. The invention provides a high speed serial receiver which is particularly suitable for use within disc drives and data storage and retrieval systems in general. The serial data receiver of the present invention does not require a clock synchronised with the incoming data. Furthermore the serial data receiver is able to share the sampling of the data bit stream between a plurality of shift registers (54) none of which need be clock more than once per data bit period.

    7.
    发明专利
    未知

    公开(公告)号：DE69332196D1

    公开(公告)日：2002-09-19

    申请号：DE69332196

    申请日：1993-03-22

    Applicant: IBM

    Inventor： FERENCE THOMAS GEORGE ,  GRUBER PETER ALFRED ,  HERNANDEZ BERNARDO ,  PALMER MICHAEL JOHN ,  ZINGHER ARTHUR RICHARD

    IPC: B23K3/00 ,  B23K1/20 ,  B23K3/06 ,  B29C45/00 ,  H05K3/34 ,  H01L21/48 ,  H01L21/00

    Abstract: An apparatus and method are described for injection molding solder mounds onto electronic devices. The apparatus has a reservoir (46) for molten solder which is disposed over a cavity in an injection plate (34). The injection plate is disposed over a mold (32) having an array of cavities therein into which solder is injection molded. The mold is disposed over a workpiece (50), such as a semiconductor chip or a semiconductor chip packaging substrate. The cavities in the mold are aligned with electrical contact locations on the chip or substrate. The workpiece is heated and the molten solder is forced under gas pressure into the cavity (68) in the injection plate (34) disposed above the array of cavities in the mold. The molten solder is forced into the array of cavities in the mold. The injection plate (34) is advanced to slide over the mold to wipe away the excess solder above the mold at a plurality of wiping apertures in the injection plate. The injection plate is further advanced to a location having a nonsolder wettable surface at which location the injection plate is removed. The mold is then removed to leave solder mounds disposed on the workpiece. The workpiece can be a semiconductor chip, a semiconductor chip packaging substrate or a dummy substrate onto which the injected molded solder adheres such as a polymer layer to form a carrier substrate for a solder mound array which can be subsequently transferred to a substrate such as a semiconductor chip or a semiconductor chip packaging substrate. The apparatus and methods of the present invention can be integrated into an automated manufacturing system for depositing an array of solder mounds onto a substrates.

    Synchronizing Trace Data
    8.
    发明专利
    Synchronizing Trace Data 未知

    公开(公告)号：GB2507049A

    公开(公告)日：2014-04-23

    申请号：GB201218550

    申请日：2012-10-16

    Applicant: IBM

    Inventor： WONG KELVIN ,  PALMER MICHAEL JOHN

    IPC: G01R31/3185

    Abstract: A logic circuit comprises a plurality of functional logic units (20) each having an independent clock signal (CLK1, CLK2) and each having a trace bus (41,42) for carrying trace data. A trace gathering logic unit (30) collects trace data from the functional logic units. The trace gathering logic unit has a clock signal (CLK_TRC) independent of the clock signals of the functional logic units and a trace bus {71,72) for receiving trace data from the functional logic units. Multiplexors {45,46) can select portions of trace data from different functional logic units. Synchronization logic is coupled to the multiplexing logic, and includes latches 84, 85, 97, 98 and detection logic (103) to communicate data based on CLK_TRC. When valid synchronized data is available at registers 110 and 111 for placing on the bus of the trace gathering logic unit, logic (112, 113) signals this to the trace gathering unit.

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