Abstract:
PROBLEM TO BE SOLVED: To provide a method and a structure for effectively emulating the memory matching behavior of a multiprocessing system on another multiprocessing system when a host multiprocessing system supports a mild matching model and a target multiprocessing system designates a strong matching model. SOLUTION: The method (and a system) for emulation in a multiprocessor system includes a step of executing the emulation in which the host mutiprocessing system of the multiprocessor system supports the weak matching model and the target multiprocessing system of the multiprocessor system supports the strong matching model. COPYRIGHT: (C)2004,JPO
Abstract:
PROBLEM TO BE SOLVED: To provide a method and a structure capable of effectively mapping memory address designation of a multiprocessing system for emulating by using virtual memory address designation of another multiprocessing system. SOLUTION: The method (and a system), for emulating the memory address designation of a target system by using the virtual/actual memory mapping mechanism of the operating system of a host mutiprocessor system, includes a step in which a target virtual memory address is inputted into a simulated page table to acquire a host virtual memory address. The target system is not acknowledged by software which the system is operating. COPYRIGHT: (C)2004,JPO
Abstract:
PROBLEM TO BE SOLVED: To provide a method and structure for efficiently emulating the memory consistency behavior of a multiprocessing system on another multiprocessing system when a host multiprocessing system supports a relaxed consistency model and a target multiprocessing system designates a strong consistency model. SOLUTION: A method (and system) of emulation in a multiprocessor system, includes a step of performing an emulation in which the host multiprocessing system of the multiprocessor system supports a weak consistency model, and the target multiprocessing system of the multiprocessor system supports the strong consistency model. COPYRIGHT: (C)2007,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide an optimization process capable of using a unique characteristic of a multiprocessor system for codes of a wide range of categories. SOLUTION: A method (and a system) for transparent dynamic optimization in a multiprocessing environment includes a step of monitoring the execution of an application on a first processor with an execution monitor operating on other processor of the system, and a step of transparently optimizing one or two or more segments of the original application with a runtime optimizer being executed on other processor of the system. COPYRIGHT: (C)2004,JPO
Abstract:
PROBLEM TO BE SOLVED: To provide a multiprocessing system, operating in a high reliability mode to detect computational errors. SOLUTION: This multiprocessing system includes a first processor, a second processor, and a compare logic. The first processor is operable to compute first results responsive to instructions, the second processor is operable to compute second results responsive to the instructions, and the compare logic is operable to check at check points for matching of the results. Each of the processors has a first register for storing one of the processor's results, and the register has a stack of shadow registers. The processor is operable to shift a current one of the processor's results from the first register into the top shadow register, so that an earlier one of the processor's results can be restored from one of the shadow registers to the first register, responsive to the compare logic determining that the first and second results mismatch.
Abstract:
PROBLEM TO BE SOLVED: To provide a method and structure which efficiently emulate memory consistency behavior of a certain multiprocessing system on other multiprocessing system when a host multiprocessing system supports a loose consistency model and a target multiprocessing system designates a rigid consistency model. SOLUTION: A method (and system) of emulation in a multiprocessor system includes a step executing an emulation in which a host multiprocessing system of the multiprocessor system supports a loose consistency model, and the target multiprocessing system of the multiprocessor system supports a rigid consistency model. COPYRIGHT: (C)2010,JPO&INPIT
Abstract:
PROBLEM TO BE SOLVED: To provide a method and a structure which permit a mutiprocessing system to use any processor instruction set and a memory architecture in order to efficiently emulate the behavior of another multiprocessing system using any other processor instruction. SOLUTION: The method (and a system), for executing a mutiprocessor program created for a target instruction set architecture on a host computing system having a plurality of processors designed for processing an instruction of second instruction set architecture, includes a step which expresses each part of a program designed for being operated on one processor of a target computing system as one or two or more program threads to be executed on a host computing system. COPYRIGHT: (C)2004,JPO
Abstract:
According to one embodiment, a multiprocessing system includes a first processor, a second processor, and compare logic. The first processor is operable to compute fir st results responsive to instructions, the second processor is operable to compute second results responsive to the instructions, and the compare logic is operable to check at checkpoints for matching of the results. Each of the processors has a first register for storing one of the processor 's results, and the register has a stack of shadow registers. The processor is operable to shift a curren t one of the processor's results from the first register into the top shadow register, so that an earlier one of the processor's results can be restored from one of the shadow registers to the first regist er responsive to the compare logic determining that the first and second results mismatch. It is advantageous that the shadow register stack is closely coupled to its corresponding register, which provides for fast restoration of results. In a further aspect of an embodiment, each processor has a signatur e generator and a signature storage unit. The signature generator and storage units are operab le to cooperatively compute a cumulative signature for a sequence of the processor's results, an d the processor is operable to store the cumulative signature in the signature storage unit pending the match or mismatch determination by the compare logic. The checking for matching of th e results includes the compare logic comparing the cumulative signatures of each respective processor. It is faster, and therefore advantageous, to check respective cumulative signatures at interva ls rather than to check each individual result.
Abstract:
Bereitgestellt werden Methoden zur Verfeinerung von Daten-Pipelines. Eine ursprüngliche Datei von serialisierten Objekten wird empfangen, und eine ursprüngliche Pipeline, die eine Mehrzahl von Transformationen aufweist, wird auf Grundlage der ursprünglichen Datei identifiziert. Für eine erste Transformation der Mehrzahl von Transformationen werden erste Datenverarbeitungskosten ermittelt. Die erste Transformation wird unter Verwendung einer vordefinierten Optimierung modifiziert, und zweite Kosten der modifizierten ersten Transformation werden ermittelt. Wenn ermittelt wird, dass die zweiten Kosten niedriger als die ersten Kosten sind, wird die erste Transformation in der ursprünglichen Pipeline durch die optimierte erste Transformation ersetzt.