FORMATION METHOD OF VIA STUD, AND SEMICONDUCTOR STRUCTURE

    公开(公告)号:JP2001351977A

    公开(公告)日:2001-12-21

    申请号:JP2001117713

    申请日:2001-04-17

    Applicant: IBM

    Abstract: PROBLEM TO BE SOLVED: To provide an interconnection part that has an improved electromigration life. SOLUTION: This formation method of a via stud includes a process that prepares a substrate 10 having first level adhesion metal 20 (a), a process that allows a layer 35 of an insulator to adhere (b), and a process that etches the insulator by a first etchant to form a related level. The related level has a line opening 33 and a via opening 34. Etching by the first etchant exposes the first level metal at the lower side of the via opening and includes a process that etches the exposed first level metal, so that the opening is formed (d) and a process that allows a linear 51 to adhere (e). The liner lines nearly the entire bottom part of the exposed first level metal and nearly the entire sidewall of the opening of the related level other than the nearly the entire sidewall of the first level metal.

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