公开(公告)号：CA1182582A

公开(公告)日：1985-02-12

申请号：CA404784

申请日：1982-06-09

Applicant: IBM

Inventor： DOUGHERTY WILLIAM E ,  GREER STUART E ,  NESTORK WILLIAM J ,  NORRIS WILLIAM T

IPC: H01L23/52 ,  H01L23/538

Abstract: AN IMPROVED SEMICONDUCTOR CHIP PACKAGE A substrate for packaging semiconductor chips is provided which is structured with conductors having opposite ends terminating in a mounting surface and intermediate portions extending beneath the surface. The ends of the conductors are arranged in repeating patterns longitudinally along the substrate separated by orthogonal strips free of conductor ends to allow for dense surface wiring. The repeating patterns are arranged to allow for chip mounting sites having sufficient spacing to allow for surface wiring. In this way chips in the same and repeat pattern can be connected by personalized surface wiring and preset subsurface conductors.