公开(公告)号：JP2008171428A

公开(公告)日：2008-07-24

申请号：JP2008001409

申请日：2008-01-08

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： FRAZIER GILES ROGER ,  CORRIGAN MICHAEL J ,  RICHARD LEWIS ARNT ,  ARMSTRONG WILLIAM JOSEPH ,  O'QUIN II JOHN THOMAS ,  NAYAR NARESH ,  MARCHINI TIMOTHY RICHARD ,  CATHY MAY

IPC: G06F9/30

CPC classification number: G06F9/30101 ,  G06F9/30181 ,  G06F9/468

Abstract: PROBLEM TO BE SOLVED: To provide a method and a system for selecting an architecture level to which a processor appears to conform in specification within a computing environment in order to achieve efficient program execution and migration among processor architectures with different levels.
SOLUTION: The method utilizes a processor compatibility register (PCR) that controls an architecture level that the processor appears to support. In one embodiment, the PCR is accessible only by super-privileged software. The super-privileged software sets bits in the PCR that specify the architecture level that the processor is to appear to support so that when the program runs on the processor, the processor behaves in accordance with the architecture level for which the program is designed.
COPYRIGHT: (C)2008,JPO&INPIT

Abstract translation: 要解决的问题：提供一种用于在计算环境中选择处理器看起来符合规范的体系结构级别的方法和系统，以便在具有不同级别的处理器架构之间实现有效的程序执行和迁移。 解决方案：该方法利用处理器兼容性寄存器（PCR）来控制处理器似乎支持的架构级别。 在一个实施方案中，PCR仅可由超级特权软件访问。 超级特权软件设置PCR中的位，指定处理器将要支持的架构级别，以便当程序在处理器上运行时，处理器的行为与程序设计的架构级别相符。 版权所有（C）2008，JPO＆INPIT

公开(公告)号：DE68923863D1

公开(公告)日：1995-09-21

申请号：DE68923863

申请日：1989-12-11

Applicant: IBM

Inventor： CHANG ALBERT ,  LEROM GEORGE ALBERT ,  NICHOLSON JAMES OTTO ,  O'QUIN III JOHN CLAUDE ,  O'QUIN II JOHN THOMAS

IPC: G06F12/08 ,  G06F12/14 ,  G06F13/12 ,  G06F21/24

Abstract: A cache for use with input/output devices attached to an input/output bus. Requests for access to system memory by an input/output device pass through the cache. Access authority is checked to determine whether an input/output device is authorised to access that particular page. If it is not, access is denied. Each input/output device has access to a portion of the cache, so that activity by one device will not interfere with activity by another.

公开(公告)号：DE3750824D1

公开(公告)日：1995-01-19

申请号：DE3750824

申请日：1987-01-08

Applicant: IBM

Inventor： CHANG ALBERT ,  MERGEN MARK FREDERICK ,  O'QUIN II JOHN THOMAS ,  O'QUIN III JOHN CLAUDE ,  ROGERS MARK DOUGLAS

IPC: G06F9/48 ,  G06F12/10 ,  G06F9/46 ,  G06F13/10

公开(公告)号：DE68923863T2

公开(公告)日：1996-03-28

申请号：DE68923863

申请日：1989-12-11

Applicant: IBM

Inventor： CHANG ALBERT ,  LEROM GEORGE ALBERT ,  NICHOLSON JAMES OTTO ,  O'QUIN III JOHN CLAUDE ,  O'QUIN II JOHN THOMAS

IPC: G06F12/08 ,  G06F12/14 ,  G06F13/12 ,  G06F21/24

Abstract: A cache for use with input/output devices attached to an input/output bus. Requests for access to system memory by an input/output device pass through the cache. Access authority is checked to determine whether an input/output device is authorised to access that particular page. If it is not, access is denied. Each input/output device has access to a portion of the cache, so that activity by one device will not interfere with activity by another.

公开(公告)号：DE3750824T2

公开(公告)日：1995-05-24

申请号：DE3750824

申请日：1987-01-08

Applicant: IBM

Inventor： CHANG ALBERT ,  MERGEN MARK FREDERICK ,  O'QUIN II JOHN THOMAS ,  O'QUIN III JOHN CLAUDE ,  ROGERS MARK DOUGLAS

IPC: G06F9/48 ,  G06F12/10 ,  G06F9/46 ,  G06F13/10

公开(公告)号：DE3279516D1

公开(公告)日：1989-04-13

申请号：DE3279516

申请日：1982-05-05

Applicant: IBM

Inventor： O'QUIN II JOHN THOMAS ,  VOSSMAN ROBERT ANTHONY ,  WOOD REBECCA SUE

IPC: G06F11/22 ,  G06F11/07

Abstract: A system for diagnosing and correcting errors in remote data processing equipment is provided in which a remote data processor (11) subject to an error condition has associated therewith disk, e.g., diskette storage means (17) together with means for recording on said diskettes data representing the status of the data processor under a par- ticuiar error condition. The remote data processor (11) further has associated therewith means (12) for transmitting the status data stored on said diskette. First receiving means distant from the remote data processor receives the transmitted data and means associated with the receiving means reconstruct the diskette containing the error status data whereby this reconstruct diskette is now available for diagnostics at a point distant from said remote data processor (11).