公开(公告)号：JP2002026296A

公开(公告)日：2002-01-25

申请号：JP2000187459

申请日：2000-06-22

Applicant: IBM

Inventor： HATANI NAOHISA ,  OKUBO MANABU

IPC: H01L21/82 ,  H01L27/118

Abstract: PROBLEM TO BE SOLVED: To make easier the layout of first-layer wiring which connects the gate wiring of each device (MISFET) of diagonally arranged gate arrays to those of the other devices when interconnecting the gate wiring to each other. SOLUTION: Part of the connecting area 10 of gate wiring 4-21p is formed by extending the part to the space between the gate wiring 4-20p of a MISFET Qp20 adjoining to the MISFET Qp21 constituted of the wiring 4-21p and the gate wiring 4-20n of a MISFET Qn20. Since the part of the connecting area (contact section) 10 of the gate wiring is formed between the MISFETs adjoining to each other in the x-direction, the connection between the gate wiring of MISFETs adjoining to each other in the y-direction become easier.

公开(公告)号：JP2000332608A

公开(公告)日：2000-11-30

申请号：JP12562799

申请日：1999-05-06

Applicant: IBM

Inventor： OMORI TADASHI ,  OKUBO MANABU ,  ONO JUNICHI

IPC: H03M1/38

Abstract: PROBLEM TO BE SOLVED: To reduce offset in the analog/digital conversion and to simplify the constitution of an analog/digital converter. SOLUTION: An analog/digital converter 10 is constituted of an operational amplifier 14 to which prescribed voltage 1/2 Vref is inputted to second input, a first switch SW1 which is connected to the first input of the operational amplifier 14 through a capacitor 12, which changes over analog input (Vin) and comparison voltage (Vc) and supplies input to the capacitor 12 and a second switch SW2 which is installed between the output, of the operational amplifier 14 and first input and connects the output of the operational amplifier 14 and first input while the first switch SW1 supplies analog input (Vin) to the capacitor 12.

公开(公告)号：JP2000151403A

公开(公告)日：2000-05-30

申请号：JP31317998

申请日：1998-11-04

Applicant: IBM

Inventor： HATANI NAOHISA ,  OKUBO MANABU

IPC: H03M1/10 ,  H03M1/06 ,  H03M1/66 ,  H03M1/78

Abstract: PROBLEM TO BE SOLVED: To decrease the nonlinearity error of an analog output with respect to a digital input to the D/A converter without employing any special analog process. SOLUTION: The n-bit D/A converter 2 is provided with a correction signal generating means 4 that generates a digital correction signal in m-bit (m is a positive integer) with respect to a digital input signal D in n-bit (n is a positive integer being 2 or over) and with a D/A conversion means 6 that converts a digital signal in (n+m)-bit consisting of the n-bit input signal D and the m-bit correction signal into an analog signal.