公开(公告)号：JP2004343452A

公开(公告)日：2004-12-02

申请号：JP2003137848

申请日：2003-05-15

Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

Inventor： OMORI TADASHI

IPC: H03K19/0175 ,  H03B1/00 ,  H03K5/153 ,  H03K19/003 ,  H03K19/0185

CPC classification number: H03K19/00315

Abstract: PROBLEM TO BE SOLVED: To provide a high-voltage input tolerant receiver having low analog signal distortion and allowing power saving.
SOLUTION: An external signal ψC inputted from a pad 2 of less than 3.6 V turns off a P-channel MOS transistor P10. As a result, a control signal ψE comes to 0 v to turn on a P-channel MOS transistor P1. In this case, an intermediate signal ψD outputted from a clamp circuit 3 comes to equal to the external signal ψC, causing no distortion. Meanwhile, the external signal ψC exceeding 3.6 V turns on the P-channel MOS transistor 10 to come a control signal ψF outputted from a differential amplifier circuit 9 to 0 V. As a result, the P-channel MOS transistor P1 is turned off to start the operation of a level keeper 6. No level keeper 6 operates until the external signal exceeds 3.6 V, inhibiting the development of a current passing through the level keeper 6.
COPYRIGHT: (C)2005,JPO&NCIPI

公开(公告)号：JP2000332608A

公开(公告)日：2000-11-30

申请号：JP12562799

申请日：1999-05-06

Applicant: IBM

Inventor： OMORI TADASHI ,  OKUBO MANABU ,  ONO JUNICHI

IPC: H03M1/38

Abstract: PROBLEM TO BE SOLVED: To reduce offset in the analog/digital conversion and to simplify the constitution of an analog/digital converter. SOLUTION: An analog/digital converter 10 is constituted of an operational amplifier 14 to which prescribed voltage 1/2 Vref is inputted to second input, a first switch SW1 which is connected to the first input of the operational amplifier 14 through a capacitor 12, which changes over analog input (Vin) and comparison voltage (Vc) and supplies input to the capacitor 12 and a second switch SW2 which is installed between the output, of the operational amplifier 14 and first input and connects the output of the operational amplifier 14 and first input while the first switch SW1 supplies analog input (Vin) to the capacitor 12.

公开(公告)号：JP2002182810A

公开(公告)日：2002-06-28

申请号：JP2000370626

申请日：2000-12-05

Applicant: IBM

Inventor： OSHIKAWA HIROSHI ,  SHIMIZU MASAHIRO ,  YAMADA MITSUHARU ,  OMORI TADASHI

IPC: G06F3/00 ,  G06F3/06 ,  G11C29/00

Abstract: PROBLEM TO BE SOLVED: To improve the reliability of data transfer by increasing timing margin without lowering data transfer speed. SOLUTION: The slew rate controller of a driver independently controls the slew rate of a data signal and the slew rate of a control signal of a strobe signal, etc., and the slew rate of the data signal is made smaller than the slew rate of the strobe signal. Namely, a waveform inclination in the transition time of the strobe signal is made larger than that of the data signal in a signal waveform.