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    2.
    发明专利
    未知

    公开(公告)号：BR8901841A

    公开(公告)日：1989-11-28

    申请号：BR8901841

    申请日：1989-04-19

    Applicant: IBM

    Inventor： GUPTA SATISH ,  LARKY STEVEN PHILIP ,  PEEVERS ALAN WESLEY ,  CLAIR JOE CHRISTOPHER ST

    IPC: G09G1/02 ,  G06F3/153 ,  G06F12/08 ,  G06F12/10 ,  G09G5/00 ,  G09G5/14 ,  G09G5/36 ,  G09G5/39 ,  G06F3/00

    Abstract: A display control means such as a virtual display adapter (110) allows the advanced functions of a display controller to be utilized in a large area of memory in addition to the normal use in display memory (120). This large area of memory includes system memory (130), and efficient access to this large area of memory is permitted for normal system use. The display controller also functions with non-contiguous and non-resident bitmaps. The flexibility of demand-paged virtual memory is utilized for display tasks, as display bitmaps may be written to the large area of memory as well as the display memory.

    4.
    发明专利
    未知

    公开(公告)号：DE69225538T2

    公开(公告)日：1999-02-04

    申请号：DE69225538

    申请日：1992-07-03

    Applicant: IBM

    Inventor： CHOI SUNG MIN ,  LUMELSKY LEON ,  PEEVERS ALAN WESLEY ,  PITTAS JOHN LOUIS

    IPC: G09G5/00 ,  G06F12/00 ,  G09G5/02 ,  G09G5/14 ,  G09G5/36 ,  G09G5/39 ,  G09G5/391 ,  G09G5/395 ,  H04N7/01

    Abstract: An image display system (10) includes an image buffer (20,22) having a plurality of addressable locations for storing image pixel data. The system further includes circuitry (24,34,36) coupled to an output of the image buffer for converting image pixel data read therefrom to electrical signals for driving an image display (18). The circuitry is responsive to signals generated by an image display controller (16) for generating one of a plurality of different timing formats for the electrical signals for driving an image display having a specified display resolution. The apparatus further includes circuitry (40,42) for configuring the image buffer in accordance with the specified display resolution. The image buffer is configurable, by example, as two, 2048 location by 1024 location by 24-bit buffers and one 2048 location by 1024 location by 16-bit buffer; or as two, 2048 location by 2048 location by 24-bit buffers and one 2048 location by 2048 location by 16-bit buffer. Each of the 24-bit buffers store R,G,B pixel data and the 16-bit buffers each store a color index (CI) value and an associated window identifier (WID) value. Circuitry at the output of the image buffer decodes CI and WID values into R,G,B pixel data and a Key value specifying pixel mixing.

    5.
    发明专利
    未知

    公开(公告)号：DE69211447T2

    公开(公告)日：1996-12-05

    申请号：DE69211447

    申请日：1992-07-02

    Applicant: IBM

    Inventor： CHOI SUNG MIN ,  LUMELSKY LEON ,  PEEVERS ALAN WESLEY ,  PITTAS JOHN LOUIS

    IPC: G06T9/00 ,  G09G5/02 ,  G09G5/04 ,  G09G5/36 ,  H04N1/41 ,  G09G5/06

    Abstract: A display system is described which includes storage for receiving a compressed pixel image manifesting at least a pair of encoded colors and a bit MASK that defines which pixels of a pixel subset of the pixel image receive one of the colors. The system comprises a plurality of memory modules (34). The pixels in the subset are interleaved in the memory modules. A generator is provided for applying signals to cause data to be written into each of modules in parallel. Register means are provided for applying data manifesting the encoded colors to the modules. Control apparatus is responsive to the MASK bits for controlling the generator to write the encoded color data, in parallel and in a single memory cycle, into all pixel positions of the subset that are designated for the color(s) by MASK bit position values.

    6.
    发明专利
    未知

    公开(公告)号：DE68917771D1

    公开(公告)日：1994-10-06

    申请号：DE68917771

    申请日：1989-04-13

    Applicant: IBM

    Inventor： GUPTA SATISH ,  LARKY STEVEN PHILIP ,  PEEVERS ALAN WESLEY ,  ST CLAIR JOE CHRISTOPHER

    IPC: G09G1/02 ,  G06F3/153 ,  G06F12/08 ,  G06F12/10 ,  G09G5/00 ,  G09G5/14 ,  G09G5/36 ,  G09G5/39 ,  G09G1/16 ,  G09G1/00

    Abstract: A display control means such as a virtual display adapter (110) allows the advanced functions of a display controller to be utilized in a large area of memory in addition to the normal use in display memory (120). This large area of memory includes system memory (130), and efficient access to this large area of memory is permitted for normal system use. The display controller also functions with non-contiguous and non-resident bitmaps. The flexibility of demand-paged virtual memory is utilized for display tasks, as display bitmaps may be written to the large area of memory as well as the display memory.

    7.
    发明专利
    未知

    公开(公告)号：DE69225538D1

    公开(公告)日：1998-06-25

    申请号：DE69225538

    申请日：1992-07-03

    Applicant: IBM

    Inventor： CHOI SUNG MIN ,  LUMELSKY LEON ,  PEEVERS ALAN WESLEY ,  PITTAS JOHN LOUIS

    IPC: G09G5/00 ,  G06F12/00 ,  G09G5/02 ,  G09G5/14 ,  G09G5/36 ,  G09G5/39 ,  G09G5/391 ,  G09G5/395 ,  H04N7/01

    Abstract: An image display system (10) includes an image buffer (20,22) having a plurality of addressable locations for storing image pixel data. The system further includes circuitry (24,34,36) coupled to an output of the image buffer for converting image pixel data read therefrom to electrical signals for driving an image display (18). The circuitry is responsive to signals generated by an image display controller (16) for generating one of a plurality of different timing formats for the electrical signals for driving an image display having a specified display resolution. The apparatus further includes circuitry (40,42) for configuring the image buffer in accordance with the specified display resolution. The image buffer is configurable, by example, as two, 2048 location by 1024 location by 24-bit buffers and one 2048 location by 1024 location by 16-bit buffer; or as two, 2048 location by 2048 location by 24-bit buffers and one 2048 location by 2048 location by 16-bit buffer. Each of the 24-bit buffers store R,G,B pixel data and the 16-bit buffers each store a color index (CI) value and an associated window identifier (WID) value. Circuitry at the output of the image buffer decodes CI and WID values into R,G,B pixel data and a Key value specifying pixel mixing.

    8.
    发明专利
    未知

    公开(公告)号：DE69211447D1

    公开(公告)日：1996-07-18

    申请号：DE69211447

    申请日：1992-07-02

    Applicant: IBM

    Inventor： CHOI SUNG MIN ,  LUMELSKY LEON ,  PEEVERS ALAN WESLEY ,  PITTAS JOHN LOUIS

    IPC: G06T9/00 ,  G09G5/02 ,  G09G5/04 ,  G09G5/36 ,  H04N1/41 ,  G09G5/06

    Abstract: A display system is described which includes storage for receiving a compressed pixel image manifesting at least a pair of encoded colors and a bit MASK that defines which pixels of a pixel subset of the pixel image receive one of the colors. The system comprises a plurality of memory modules (34). The pixels in the subset are interleaved in the memory modules. A generator is provided for applying signals to cause data to be written into each of modules in parallel. Register means are provided for applying data manifesting the encoded colors to the modules. Control apparatus is responsive to the MASK bits for controlling the generator to write the encoded color data, in parallel and in a single memory cycle, into all pixel positions of the subset that are designated for the color(s) by MASK bit position values.

    10.
    发明专利
    未知

    公开(公告)号：AT110873T

    公开(公告)日：1994-09-15

    申请号：AT89106573

    申请日：1989-04-13

    Applicant: IBM

    Inventor： GUPTA SATISH ,  LARKY STEVEN PHILIP ,  PEEVERS ALAN WESLEY ,  ST CLAIR JOE CHRISTOPHER

    IPC: G09G1/02 ,  G06F3/153 ,  G06F12/08 ,  G06F12/10 ,  G09G5/00 ,  G09G5/14 ,  G09G5/36 ,  G09G5/39 ,  G09G1/16 ,  G09G1/00

    Abstract: A display control means such as a virtual display adapter (110) allows the advanced functions of a display controller to be utilized in a large area of memory in addition to the normal use in display memory (120). This large area of memory includes system memory (130), and efficient access to this large area of memory is permitted for normal system use. The display controller also functions with non-contiguous and non-resident bitmaps. The flexibility of demand-paged virtual memory is utilized for display tasks, as display bitmaps may be written to the large area of memory as well as the display memory.

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