Monolithic bipolar transistor storage arrangement with latent bit pattern
    1.
    发明授权
    Monolithic bipolar transistor storage arrangement with latent bit pattern 失效
    单晶双极晶体管存储装置与专利位图案

    公开(公告)号:US3801967A

    公开(公告)日:1974-04-02

    申请号:US3801967D

    申请日:1973-02-12

    Applicant: IBM

    Abstract: A monolithic storage arrangement comprising a plurality of cross-coupled bipolar transistor bistable storage cells selectively operable both as a read-write storage and as a readonly storage. The switching nodes of each storage cell are connected to respective switching bipolar transistors which are complementary with respect to the cross-coupled transistors, the collector-base section of the switching transistors being connected in parallel with the base-emitter section of the respective cross-coupled transistors. For read-only operation, the emitter of one of the switching transistors is connected to a control line with the emitter of the other switching transistor remaining unconnected in accordance with predetermined fabrication personalization. The connected switching transistor injects current into the base of its associated cross-coupled transistor when the control line is suitably energized to place the cell into a desired read-only state. Both switching transistors are deactivated during read-write operation.

    Abstract translation: 一种单片存储装置,包括可选择性地兼作读写存储器和只读存储器的多个交叉耦合双极晶体管双稳态存储单元。 每个存储单元的开关节点连接到相对于交叉耦合晶体管互补的相应的开关双极晶体管,开关晶体管的集电极 - 基极部分与各自的交叉耦合晶体管的基极 - 发射极部分并联连接, 耦合晶体管。 对于只读操作,其中一个开关晶体管的发射极根据预定的制造个性化被连接到控制线,而另一个开关晶体管的发射极保持未连接。 当控制线被适当地通电以将电池置于期望的只读状态时,连接的开关晶体管将电流注入到其相关联的交叉耦合晶体管的基极中。 在读写操作期间,两个开关晶体管都被禁止。

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