公开(公告)号：WO2004111596A2

公开(公告)日：2004-12-23

申请号：PCT/EP2004050633

申请日：2004-04-28

Applicant: IBM ,  IBM DEUTSCHLAND ,  SAALMUELLER DR JUERGEN ,  NEUMANN MARTIN ,  PIETSCHMANN WALTER ,  KLINKE ERHARD

Inventor： SAALMUELLER DR JUERGEN ,  NEUMANN MARTIN ,  PIETSCHMANN WALTER ,  KLINKE ERHARD

IPC: G06F13/40 ,  G01L13/00

CPC classification number: G06F13/4072

Abstract: The disclosed serial bus interface keeps most the time a driver buffer of the bus master active, except of a defined interval where a response from the slave is expected. This guarantees that a request echo of a request packet sent from the master reflected on a far non-terminated end of the slave gets terminated. The traveling time for such signal echoes can be defined by the distance in wire length between the master and the slave and/or the electrical characteristics of the transmission line. The slave can receive the request packet, add some processing time and send a response delayed by a programmable delay element. The response packet can arrive at the master after a further traveling delay. At that time, the request echo is already terminated and does no more disturb the data transmission. A programmable delay clement moves the above mentioned interval exactly to that point where a response packet arrives at the master. After such response was received, the driver buffer gets activated again while an according driver buffer on the slave side gets deactivated. Due to an active termination, a response echo gets canceled after a further round trip. During that time, any input on a receiver buffer on the slave side is ignored.

Abstract translation: 所公开的串行总线接口保持总线主机的驱动器缓冲器的大部分时间，除了预期来自从机的响应的定义的间隔之外。 这保证了从主机远端未被终止的端口反映的主机发出的请求报文的请求回应被终止。 这种信号回波的行进时间可以通过主机和从机之间的线长度和/或传输线的电气特性来定义。 从机可以接收请求分组，添加一些处理时间并发送延迟由可编程延迟单元延迟的响应。 响应包可以在进一步的行进延迟之后到达主机。 此时，请求回显已经被终止，不再干扰数据传输。 可编程延迟元件将上述间隔精确地移动到响应包到达主器件的那一点。 接收到这样的响应后，驱动程序缓冲区再次被激活，而从端的相应的驱动程序缓冲区被禁用。 由于主动终止，响应回波在进一步往返之后被取消。 在此期间，从机侧的接收缓冲区上的任何输入都被忽略。

公开(公告)号：AU2003233799A1

公开(公告)日：2004-11-23

申请号：AU2003233799

申请日：2003-04-29

Applicant: IBM

Inventor： ARNEZ ANDREAS ,  PIETSCHMANN WALTER ,  SAALMULLER JURGEN ,  AMANN EBERHARD

IPC: G06F9/445 ,  G06F11/14

公开(公告)号：DE4402716C2

公开(公告)日：1996-08-29

申请号：DE4402716

申请日：1994-01-29

Applicant: IBM

Inventor： MEYERDIRKS HERBERT ,  PIETSCHMANN WALTER

IPC: G01R31/36 ,  H01M10/48 ,  H02J7/00 ,  H02J15/00 ,  H02J9/04 ,  G01R17/00

Abstract: Disclosed is a system for supplying power to an apparatus (170, 175) with a power-storage device (200) for storing electric power, a first measuring device (310) for measuring a first electrical quantity of the power-storage device (200), a time-determining device (360) for determining the time taken for the first electrical quantity to reach a first level, a second measuring device (320) for measuring a second electrical quantity of the power-storage device (200) and a comparator (330) for comparing the second electrical quantity relative to the determined time with a stored typical time-characteristic of the second electrical quantity. Thereby a method of assessing the lifetime and capacity of the power-storage device (200) is used with as a first step (500) the measurement of a first electrical quantity of the power-storage device (200), as a second step (510) the determination of the time taken for the first electrical quantity to reach a first level, as a third step (520) the measurement of a second electrical quantity of the power-storage device (200), as a fourth step (530) the comparison of the second electrical quantity relative to the determined time with a stored typical time-characteristic of the second electrical quantity and as a fifth step (540) the evaluation of the comparison from the fourth step for an assessment of the lifetime and capacity of the power-storage device (200).

公开(公告)号：CA2529132A1

公开(公告)日：2004-12-23

申请号：CA2529132

申请日：2004-04-28

Applicant: IBM

Inventor： PIETSCHMANN WALTER ,  KLINKE ERHARD ,  NEUMANN MARTIN ,  SAALMUELLER JURGEN

IPC: G06F13/40

Abstract: The disclosed serial bus interface keeps most the time a driver buffer of th e bus master active, except of a defined interval where a response from the slave is expected. This guarantees that a request echo of a request packet sent from the master reflected on a far non-terminated end of the slave gets terminated. The traveling time for such signal echoes can be defined by the distance in wire length between the master and the slave and/or the electric al characteristics of the transmission line. The slave can receive the request packet, add some processing time and send a response delayed by a programmab le delay element. The response packet can arrive at the master after a further traveling delay. At that time, the request echo is already terminated and do es no more disturb the data transmission. A programmable delay clement moves th e above mentioned interval exactly to that point where a response packet arriv es at the master. After such response was received, the driver buffer gets activated again while an according driver buffer on the slave side gets deactivated. Due to an active termination, a response echo gets canceled aft er a further round trip. During that time, any input on a receiver buffer on th e slave side is ignored.

公开(公告)号：DE4402716A1

公开(公告)日：1995-08-03

申请号：DE4402716

申请日：1994-01-29

Applicant: IBM

Inventor： MEYERDIRKS HERBERT ,  PIETSCHMANN WALTER

IPC: G01R31/36 ,  H01M10/48 ,  H02J7/00 ,  H02J15/00 ,  H02J9/04 ,  G01R17/00

Abstract: Disclosed is a system for supplying power to an apparatus (170, 175) with a power-storage device (200) for storing electric power, a first measuring device (310) for measuring a first electrical quantity of the power-storage device (200), a time-determining device (360) for determining the time taken for the first electrical quantity to reach a first level, a second measuring device (320) for measuring a second electrical quantity of the power-storage device (200) and a comparator (330) for comparing the second electrical quantity relative to the determined time with a stored typical time-characteristic of the second electrical quantity. Thereby a method of assessing the lifetime and capacity of the power-storage device (200) is used with as a first step (500) the measurement of a first electrical quantity of the power-storage device (200), as a second step (510) the determination of the time taken for the first electrical quantity to reach a first level, as a third step (520) the measurement of a second electrical quantity of the power-storage device (200), as a fourth step (530) the comparison of the second electrical quantity relative to the determined time with a stored typical time-characteristic of the second electrical quantity and as a fifth step (540) the evaluation of the comparison from the fourth step for an assessment of the lifetime and capacity of the power-storage device (200).