1.
    发明专利
    未知

    公开(公告)号:DE2359150A1

    公开(公告)日:1974-07-11

    申请号:DE2359150

    申请日:1973-11-28

    Applicant: IBM

    Abstract: Disclosed is a true complement generator for providing the true and complement values of an input signal as an output, in response to predetermined timing signals. A first portion of the true complement generator is a gated inverter circuit generating a complement output. A second portion of the true complement generator is a gated driver circuit generating a true output. The true and complement phases of the input signal appear at the respective output nodes during the occurrence of a first timing signal, while both output nodes are held to the same level during the occurrence of a second timing signal.

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