公开(公告)号：JP2002083887A

公开(公告)日：2002-03-22

申请号：JP2001197828

申请日：2001-06-29

Applicant: IBM

Inventor： CHEN BOMY A ,  HARRINGTON JAY G ,  KEVIN M HALLIHAN ,  DENNIS HOINIAKKU ,  CHAN HON RAMU ,  HYUN KOO LEE ,  REBECCA D MII ,  RANKIN JED H

IPC: H01L21/8247 ,  G11C16/04 ,  H01L21/28 ,  H01L27/115 ,  H01L29/423 ,  H01L29/788 ,  H01L29/792

Abstract: PROBLEM TO BE SOLVED: To provide a structure and a method for an EEPROM device, having a high performance logic (such as complementary metal-oxide semiconductor(CMOS), for example), or EEPROM device, being integrated with a nonvolatile random access memory(NVRAM). SOLUTION: The EEPROM device is provided with mutually self-matched floating gate and program gate. During programming, electronic tunneling occurs between the floating gate and the program gate.