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    Apparatus for positioning articles on substrates
    1.
    发明授权
    Apparatus for positioning articles on substrates 失效
    在基板上定位文章的装置

    公开(公告)号：US3475805A

    公开(公告)日：1969-11-04

    申请号：US3475805D

    申请日：1967-06-26

    Applicant: IBM

    Inventor： ROTTMANN HANS R

    IPC: H01L21/00 ,  H05K13/04 ,  B23P19/04

    CPC classification number: H01L21/67144 ,  H05K13/0413 ,  Y10T29/53061 ,  Y10T29/53178 ,  Y10T29/53191

    Abstract: 1,218,856. Photo-electric position finding. INTERNATIONAL BUSINESS MACHINES CORP. 17 June, 1968 [26 June, 1967], No. 28707/68. Heading H4D. [Also in Division B8] Chip 10 (Fig. 4) has reflective pads [45, the edges 46, 47 of which have to be related to respective axes Y and X by measurements of X 1 , X 2 and of Y 1 . The pads are illuminated by sources 48, 49 and the image is projected by lens 54 and split of mirror 55 into the two images 62 and 63 reflected respectively by rotating mirrors 68 and 64 through slots 70, and 66 and 67, on to photo-cells 52, and 50 and 51. The reference axes X and Y are projected as an image by source 59, which image is split to form corresponding axes along the two given paths by the mirror 55. Each cell thus receives, as the mirrors rotate, two successive images, respectively of edge and axis, the three cells corresponding to the three given points, so that the three cells give signals corresponding to the three distances x 1 , x 2 , Y 1 . Positioning device circuit (Fig. 5).-The positioning of the chip is effected by three motors 71, 72, 73 controlled by the photocells 50, 51, 52 (see above). The two signals from cell 50 are passed to counter 93 so that the counter is started then stopped. The number of impulses between the two signals is a measure of x, and they are passed via pulse storage means 103 (which delays the pulses) to motor 71. Likewise, the two signals from cell 51 are passed to counter 94 and the corresponding impulses, which represent x 2 , are passed to motor 72 via pulse storage 104. Finally, the two signals from cell 52 are passed to counter 95 and then fed to motor 73 via pulse storage 105. In this way the three motors 71, 72, 72 are driven by an amount proportional to the relative measurements x 1 , x 2 , y 1 and thus displace the chip into the desired orientation.

    Method and apparatus for manufacturing integrated circuits
    2.
    发明授权
    Method and apparatus for manufacturing integrated circuits 失效
    用于制造集成电路的方法和装置

    公开(公告)号：US3581375A

    公开(公告)日：1971-06-01

    申请号：US3581375D

    申请日：1969-03-07

    Applicant: IBM

    Inventor： ROTTMANN HANS R

    IPC: H05K13/04 ,  B65H9/00 ,  H01L21/68 ,  H05K3/00

    CPC classification number: H01L21/681 ,  Y10T29/49769 ,  Y10T29/53178 ,  Y10T29/53261

    Abstract: A METHOD AND APPARATUS FOR ACCURATELY POSITIONING SOLID-STATE CHIPS, HAVING PERIPHERAL CONDUCTIVE PADS, IN RETAINING CAVITIES OF INSULATING SUBSTRATES HAVING CORRESPONDING CONDUCTIVE POINTS PREPARATORY TO BONDING THE CHIPS INTO THE SUBSTRATE AND INTERCONNECTING THE CHIP PADS AND SUBSTRATE POINTS TO FORM "INTEGRATED CIRCUITS." THE CHIP AND A PORTION OF THE AREA SURROUNDING THE CAVITY OF THE SUBSTRATE ARE OPTICALLY SCANNED IN A NUMBER OF AXES AND AN ELECTRICAL OUTPUT SIGNAL REPRESENTATIVE OF THE OPTICALLY SCANNED POINTS IS SUPPLIED TO LOGIC WHICH SELECTS THOSE ELECTRICAL PULSE WHICH REPRESENT THE SUBSTRATE CONDUCTIVE POINTS OR TERMINALS AND CHIP PAD CENTER LINES. MEASUREMENT COUNTER LOGIC IS OPERATED BY THE SELECTED PULSES TO RECORD COUNTS CORRESPONDING TO THE SELECTED SCANNED POINTS. THE RECORDED COUNTS ARE USED TO POSITION STEPPING MOTORS TO PROPERLY POSITION HE RELATIVE POSITIONS OF THE CHIP AND A CAVITY OF THE SUBSTRATE PRIOR TO PLACING THE CHIP IN THE SUBSTRATE CAVITY.

    Optical mask with integral spacers and method of making
    6.
    发明授权
    Optical mask with integral spacers and method of making 失效
    具有整体间隔的光学面罩及其制作方法

    公开(公告)号：US3676002A

    公开(公告)日：1972-07-11

    申请号：US3676002D

    申请日：1969-06-30

    Applicant: IBM

    Inventor： MOREAU WAYNE M ,  ROTTMANN HANS R

    IPC: G03F1/00 ,  G03B27/28

    CPC classification number: G03F1/50

    Abstract: THIS IS AN OPTICAL MASK PRIMARILY FOR USE IN THE MANUFACTURE OF SOLID STATE SEMICONDUCTOR DEVICES. THE MASK HAS INTEGRAL SPACER PORTIONS WHICH INTIMATELY CONTACT THE SURFACE OF THE DEVICE DURING THE STAGE IN THE PROCESSING WHEN THE PHOTORESIST IS EXPOSED. THESE INTEGRAL SPACERS NOT ONLY PROTECT THE MASK DURING CONTACT WITH THE DEVICE BUT ALSO PROVIDE IMPROVED DEVICES BECAUSE OF SUPERIOR OPTICAL CHARACTERISTICS.

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