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公开(公告)号：JPH0855985A
公开(公告)日：1996-02-27
申请号：JP17370995
申请日：1995-07-10
Applicant: IBM
Inventor： RUI RU CHIEN SHIYUU , CHIYAN MIN SHIE , RINDON RONARUDO ROOGAN , JIYATSUKU ARAN MANDERUMAN , OGURA SEIKI
IPC: G03F1/08 , H01L21/027 , H01L21/28 , H01L21/336 , H01L21/76 , H01L29/423 , H01L29/78
Abstract: PROBLEM TO BE SOLVED: To provide the separate design of field effect transistor(FET) device so as to reduce a leakage current induced along the edge of FET device, especially, submicron FET device to use shallow trench isolation. SOLUTION: An FET device is isolated by shallow trench isolation structure having channel width between 1st and 2nd shallow trenches at the edges of 1st and 2nd shallow trenches. A gate 14 is extended across the channel width between the 1st and the 2nd shallow trenches. The gate has a 1st length at the edge and has a 2nd length shorter than the 1st length between the edges. The 1st length and the 2nd length are related such that a Vt at the edge can be almost equal with a Vt between the edges. The gate structure of the FET device is produced using a unique phase shift mask, and the production of submicron FET device having the extremely short length is enabled.
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公开(公告)号：JPH0851208A
公开(公告)日：1996-02-20
申请号：JP16265395
申请日：1995-06-28
Applicant: IBM
IPC: H01L21/336 , H01L29/786
Abstract: PURPOSE: To form a body contact without requiring penetration through a source, as required by conventional technology, while minimizing increase of the area by fabricating an SOI transistor having a self-aligned body contact passing through the extension to a gate. CONSTITUTION: An initial opening is defined by protruding a source 116 and a drain 114 and a conformal layer 120 is formed thereon. It is then etched to form side walls defining an aperture and a contact aperture is etched using these side walls to define a side wall supporting member for supporting an insulation side wall thus isolating a collector electrode from the gate, source and drain.
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