公开(公告)号：JPH06111589A

公开(公告)日：1994-04-22

申请号：JP24311892

申请日：1992-09-11

Applicant: IBM

Inventor： NIIJIMA HIDETO ,  TOYOOKA TAKASHI ,  SATO AKASHI ,  SAKAGAMI YOSHIKATSU

IPC: G11C17/00 ,  G06F11/10 ,  G11C16/02 ,  G11C16/06 ,  G11C16/16 ,  G11C16/22 ,  G11C29/00 ,  G11C29/04 ,  G11C29/42 ,  H01L21/8247 ,  H01L27/115 ,  H01L29/788 ,  H01L29/792

Abstract: PURPOSE: To obtain the efficient redundant constitution of a batch erasing type nonvolatile semiconductor storage device. CONSTITUTION: The array of a memory cell 31 is physically divided into a data area 36 and a tag area 37 to separately batch-erase the respective areas while sharing a word line 32. In the unit of the areas 36 and 37 sharing one word line, the area 37 holds positional information of a defective memory cell in the area 36. Based on this information, a system executes the using avoiding processing of the defective memory cell. Defective memory cell information is programmed in an inspection process after producing a chip, and ECC is written in the area 37 with respect to this defective memory cell information. By writing fixed data in the area 37, the using prohibition of the area 36 sharing the word line with the area 37 is reported to the system. Even when the area 36 is batch-erased, the area 37 is not erased and defective memory cell positional information is held.

公开(公告)号：JPH0527924A

公开(公告)日：1993-02-05

申请号：JP19731891

申请日：1991-07-12

Applicant: IBM

Inventor： SAKAGAMI YOSHIKATSU ,  NIIJIMA HIDETO

IPC: G06F3/08 ,  G06F3/06 ,  G06F12/00 ,  G06F12/02 ,  G06F12/08 ,  G06F12/12 ,  G11C16/02 ,  G11C16/10 ,  G11C16/34 ,  G11C17/00

Abstract: PURPOSE: To make it possible to perform reading out and writing of data with a host CPU, to process at a speed higher than the speed of the conventional magnetic disks and to make the entire memory usable effectively over a long period of time without allowing only the specific sector to be frequently written and erased. CONSTITUTION: An address control system which imparts flexibility to the address relation between the host CPU and an external memory device and prevents the physically address of a semiconductor memory is not one-sidedly determined by the logical address possessed by the command of the host CPU is introduced. A command processing section 34 prepares memory blocks and sectors for writing or erasing and copying at all times preparatory to the command processing of the host CPU and records and holds the corresponding relation of the physical addresses of the selected memory block 32i or sectors and the commands of the host CPU on an address conversion table 36. The conditions of the memory blocks and sectors are recorded on a management table 35 and are utilized for control of processing, such as writing, erasing and copying preparatory to or in response with the commands of the host CPU.

公开(公告)号：JPH06131266A

公开(公告)日：1994-05-13

申请号：JP25628492

申请日：1992-09-25

Applicant: IBM

Inventor： NIIJIMA HIDETO ,  SATO AKASHI ,  SAKAGAMI YOSHIKATSU

IPC: G06F12/08 ,  G06F9/445 ,  G06F12/00 ,  G06F12/02 ,  G06F12/10 ,  G06F12/12

Abstract: PURPOSE: To execute a program without reading it on a main memory unit and to unitarily manage the program and data on a randomly accessible and rewritable memory without distinguishing them. CONSTITUTION: A computer system is provided with a CPU for converting addresses by referring to a real/virtual address conversion table provided with a page table 25 and an external storage device for using the randomly accessible and rewritable memory connected to the CPU. The page table 25 is constituted so as to make the codes of the program be continuous on the virtual address space of the CPU corresponding to an execution order, and by referring to the real/virtual address conversion table provided with the page table, the program stored in the external storage device is read from the external storage device and executed by using a virtual address. Also, the real address of the CPU is allocated only to the data area of the randomly accessible memory.

公开(公告)号：JPH06250798A

公开(公告)日：1994-09-09

申请号：JP3522893

申请日：1993-02-24

Applicant: IBM

Inventor： NIIJIMA HIDETO ,  ASANO HIDEO ,  SAKAGAMI YOSHIKATSU ,  TOYOOKA TAKASHI

IPC: G06F3/08 ,  G06F3/06 ,  G06F12/00 ,  G06F12/02 ,  G11C16/02 ,  G11C16/10 ,  G11C17/00 ,  G11C16/06

Abstract: PURPOSE: To discriminate an invalid sector from a valid sector without using a method for overwriting by ensuring a cluster information sector in each cluster, applying a sequence number to the cluster so as not to be doubled, and writing the sequence number assigned to the cluster in the cluster information sector of each cluster. CONSTITUTION: A batch delete type nonvolatile memory 20 can be deleted by each cluster unit, a cluster information sector is ensured in each of the N pieces of clusters, a sequence number is preliminarily applied to the N pieces of clusters so as not to be overlapped, and the sequence number of the cluster is written in the cluster information sector of each cluster. At the time of deleting a certain cluster, a controller 30 maintains the sequence number of the cluster at first, and at the time of initializing the deleted cluster, the controller 30 writes a value larger than the present maximum sequence number in the cluster information sector as the sequence number of the cluster. The controller 30 writes user data according to the sequence number of the physical address of the sector.