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    MANUFACTURE OF LIQUID CRYSTAL CELL HAVING CORNER AREA WITH SEAL MATERIAL COATED UNDER CONTROL
    9.
    发明专利
    MANUFACTURE OF LIQUID CRYSTAL CELL HAVING CORNER AREA WITH SEAL MATERIAL COATED UNDER CONTROL 失效

    公开(公告)号：JP2000193989A

    公开(公告)日：2000-07-14

    申请号：JP36476099

    申请日：1999-12-22

    Applicant: IBM

    Inventor： SUZUKI SHUNJI ,  NOGUCHI MICHIKAZU ,  MIWA KOICHI ,  HONG CHANG LEE ,  SERAPHIM DONALD P ,  DEAN WILLIAM SKINNER

    IPC: G02F1/13 ,  G02F1/1339

    Abstract: PROBLEM TO BE SOLVED: To obtain a method for coating a corner area of a substrate with a sealant so that a liquid crystal cell can have a wide display area. SOLUTION: A projected part 100 is provided in the area of a side of one surface of a 1st substrate 20 and given a step so that the top surface of the corner area is lower. Using dispenser, the side area and corner area is coated with a sealant 30 along the circumference of the 1st substrate 20. When a 2nd substrate is put on the 1st substrate 20, the applied seal material 30 collapses, but the spread of the inside edge 36 of the sealant becomes smaller in the corner area of the liquid crystal cell because the step exists. This method prevents the sealant 30 from spreading inward in the corner area and the sealant can be formed while being controlled into a frame shape closely to the display area 13, so a wider display area than before can be realized.

    INTEGRATED CIRCUIT ARRANGEMENT USING PREFORMED SEMICONDUCTOR WAFER
    10.
    发明专利
    INTEGRATED CIRCUIT ARRANGEMENT USING PREFORMED SEMICONDUCTOR WAFER 未知

    公开(公告)号：CA948329A

    公开(公告)日：1974-05-28

    申请号：CA948381

    申请日：1965-12-22

    Applicant: IBM

    Inventor： CAMPAGNA FRANK J ,  GREGOR LAWRENCE V ,  SERAPHIM DONALD P

    IPC: H01L21/316 ,  H01L49/02 ,  H01L1/14

    Abstract: 1,095,413. Semi-conductor devices. INTERNATIONAL BUSINESS MACHINES CORPORATION. Nov. 8, 1965 [Dec. 24, 1964], No. 47223/65. Heading H1K. Parts of a layer of semi-conductor material forming components of an integrated circuit are isolated by etching deep grooves between them and filling the grooves with insulating material. An N-type silicon substrate 1a has a P-type epitaxial layer 1b deposited on one surface by thermal decomposition of silicon tetrachloride using hydrogen as a carrier gas. The surface of layer 1b is covered with a photo-resist which is exposed and developed, Fig. 2A (not shown). The wafer is then etched using a mixture of nitric, hydrofluoric and acetic acids to expose the substrate, Fig. 2B (not shown). The surface is masked using a thermally grown oxide layer and phosphorus is diffused-in to form highly conductive connection regions (5) extending across the floors of etched grooves (B) and up the sides of the islands (R), Fig. 2D (not shown). The oxide mask is removed and the device anodized, using sulphuric acid and a platinum cathode, to form a thick layer (7) of silicon dioxide which at least fills grooves (B), Fig. 2E (not shown). The surface of oxide layer (7) is masked with a photo-resist (25) Fig. 2F (not shown), and is etched to expose the surfaces of the islands (R), Fig. 2G (not shown), to provide a reference level. The surface of the wafer is lapped to this reference level and chemically polished using sodium hydroxide, Fig. 2E (not shown). An oxide layer 9 is then formed on the surface of the wafer and transistors are formed by diffusion in selected islands A, Fig. 1C. Interconnections are formed by vapour depositing strips 13 of aluminium or molybdenum over the oxide layer, crossovers being effected by contacting the ends of diffused connection regions 5 and depositing the crossing connections on top of oxide layer 7 at right angles to region 5. The arrangement of an AND-INVERT gate is illustrated, Figs. 1A and 1D (not shown), in which four transistors (T1 to T4) are formed in islands (A), while the diffused connection regions (5) extend between smaller islands (C) on which connections are made between deposited conductors and regions (5). Thin film resistors (3, 3 1 ) are deposited on top of oxide layer (7) and extend at right angles to the direction of regions (5).

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