Abstract:
1,193,532. Semi-conductor devices. INTERNATIONAL BUSINESS MACHINES CORP. 8 Jan., 1968 [13 Jan., 1967], No. 1001/68. Heading H1K. [Also in Division C7] Electrical contact is made to a semi-conductor region with an impurity concentration of at least 1018 atoms cm. -3 by depositing first a film of chromium, aluminium or titanium and then a film of nickel, silver, copper or copper chromium alloy. In one embodiment an antimony-doped N+type silicon wafer carrying an epitaxial N type layer is first provided with a silicon oxide coating by heating in dry oxygen and then in steam, or by R.F. sputtering, or with a layer of silicon nitride or alumina. Base and emitter regions are then formed by successive diffusions of boron and phosphorus into the N layer using standard planar techniques, the second diffusion doping the emitter and collector contact region with 5 Î 10 20 atoms/c.c. of phosphorus. Aluminium base and emitter contacts are next provided by vapour deposition overall followed by form-etching and sintering. Glass is subsequently deposited over the contacted face of the wafer in two stages of R.F. sputtering each followed by a firing stage. The wafer is then inverted in an evacuated vapour deposition chamber and its back collector contact face coated with successive layers of chromium, copper and gold of specified thickness while the wafer is held at 200-250‹ C. Holes are next etched through the glass layer to expose the aluminium contacts upon which similar layers of Cr, Cu and Au are then deposited through masks followed by layers of lead-tin solder by means of which nickel-plated copper balls are attached to the contacts. Finally the completed elements are attached to silver palladium lands on an alumina mounting plate and the ball contacts connected via nickel-plated copper strips to adjacent lands using lead-tin solder. In alternative planar diode and transistor embodiments the outer layer of gold is omitted.
Abstract:
1477544 Semiconductor assemblies INTERNATIONAL BUSINESS MACHINES CORP 20 May 1975 [19 Aug 1974] 21597/75 Headings H1K and H1R A semiconductor assembly comprises a monocrystalline silicon member 16, in particular a silicon integrated circuit device, provided with a plurality of electrical contacts, a silicon nitride (Si 3 N 4 ) support substrate 10, Fig. 2, having co-efficient of thermal expansion closely corresponding to that of the silicon member and electrical contacts registering with the contacts of the silicon member, the contacts of the substrate and the silicon member being electrically joined by metallurgical bonds 17, e.g. solder bonds or ultrasonic solid bonds, so that the substrate and the silicon member are spared from each other; and an electrically conductive pattern 14 on the substrate 10 providing external connections. In the embodiment of Fig. 3, silicon integrated circuit devices 16 are bonded to a moncrystalline silicon member 20 in the manner described above, there being interconnection pattern formed on the member 20 by utilizing known masking and diffusion techniques or by depositing a conductive pattern or an insulating layer on the silicon member, and the silicon member 20 is in turn mounted on the silicon nitride support substrate through solder bonds or ultrasonic solid bonds 26. Pins 12 may be provided on the substrate for providing electrical connectons with a card or board 24. The substrate 10 is formed by compacting silicon nitride particles into the desired shape and sintering, on it may be formed by deposition.