公开(公告)号：DE2456709A1

公开(公告)日：1975-07-10

申请号：DE2456709

申请日：1974-11-30

Applicant: IBM

Inventor： BOSSEN DOUGLAS CRAIG ,  CORDI VINCENT ANTHONY ,  GLICK ELLIS WILLIAM ,  HSIAO MU-YUE ,  SHIFFRIN BARRY NORMAN

IPC: G06F12/16 ,  G06F11/10 ,  H03M13/00 ,  H03K13/32

Abstract: An error correction and detection circuit includes a modular encoder that provides the minimum number of check bits for encoding a particular number of data bits. Means is provided for combining several units to produce the minimum number of code bits when a larger data word is to be encoded. A storage hierarchy system using this error correction circuit is also disclosed.