公开(公告)号：GB2461648A

公开(公告)日：2010-01-13

申请号：GB0913415

申请日：2009-08-03

Applicant: IBM

Inventor： SCHLIPF THOMAS ,  FRITZ ROLF ,  SMITH CHRISTOPHER S ,  MAYER ULRICH ,  LUNTEREN JAN VAN

IPC: G05B19/045

Abstract: A system stores an input compare vector in an input compare vector table. The system also stores an output vector, a next state value and a next state start address in an output vector, next state, next state address table. Each comparator compares each input compare vector from the input compare vector table and an external input vector, and outputs a selection signal to a multiplexer. The multiplexer associates the selection signals with an offset value, and provides the offset value to adder logic. The adder logic adds the offset value and an address from a current state start address register. A result of the addition is used as an address to access a row in the output vector, next state, next state address table. The accessed row has an output vector, a next state value and a next state start address corresponding to a current state and the external input vector.

公开(公告)号：GB2461649A

公开(公告)日：2010-01-13

申请号：GB0913420

申请日：2009-08-03

Applicant: IBM

Inventor： SCHLIPF THOMAS ,  FRITZ ROLF ,  SMITH CHRISTOPHER S ,  MAYER ULRICH ,  LUNTEREN JAN VAN

IPC: G05B19/045

Abstract: Preventing a communication loop in communicating finite state machines by providing two tables, an output next state (OTNS) table and a communication output (COUT) table. The OTNS table is divided into two array data structures, an input compare vector (ICVT1) and an output next state next address table (ONNT). The COUT table is divided into two array data structures, an input compare vector (ICVT2) and a communication output table (COMCONT). Input compare vectors in the ICVT1 are retrieved and fed into comparators. The comparators compare the retrieved input compare vectors with an input signal. When a match is found, a corresponding comparator sets a corresponding selection signal to a pre-determined value to generate an offset value through a multiplexer. An adder adds the offset value and a value stored in a current state start address (CSSA) register, and generates an adding result. The adding result is used as an address to access a row in the ONNT. There is state transition information in that row of the ONNT.

公开(公告)号：GB2461648B

公开(公告)日：2014-05-07

申请号：GB0913415

申请日：2009-08-03

Applicant: IBM

Inventor： SCHLIPF THOMAS ,  FRITZ ROLF ,  SMITH CHRISTOPHER S ,  MAYER ULRICH ,  LUNTEREN JAN VAN

IPC: G05B19/045