公开(公告)号：US3417380A

公开(公告)日：1968-12-17

申请号：US60924867

申请日：1967-01-13

Applicant: IBM

Inventor： HASBROUCK LEO J ,  OSSOLINSKI EDWARD J ,  SMITH GORDON L

IPC: G06F9/30 ,  G06F9/32 ,  G06F9/38 ,  G06F12/04 ,  G06F13/12

CPC classification number: G06F9/3802 ,  G06F9/30149 ,  G06F9/325 ,  G06F12/04 ,  G06F13/12

公开(公告)号：US3386083A

公开(公告)日：1968-05-28

申请号：US60924167

申请日：1967-01-13

Applicant: IBM

Inventor： GELLER ALAN R ,  HASBROUCK LEO J ,  SMITH GORDON L

IPC: G06F9/48

CPC classification number: G06F9/4818

公开(公告)号：US3386038A

公开(公告)日：1968-05-28

申请号：US44567165

申请日：1965-04-05

Applicant: IBM

Inventor： JAN JOHANSEN THORE ,  OSSOLINSKI EDWARD J ,  SMITH GORDON L

IPC: G06F1/10

CPC classification number: G06F1/10

公开(公告)号：US3626427A

公开(公告)日：1971-12-07

申请号：US3626427D

申请日：1967-01-13

Applicant: IBM

Inventor： MACSORLEY OLIN L ,  HASBROUCK LEO J ,  STETLER WESLEY C ,  HOLLERAN C RICHARD ,  GELLER ALAN R ,  KURTZ CLARK ,  NELSON ROBERT A ,  SMITH GORDON L ,  SPENCER DANA R ,  TIMM JOE F ,  WISSICK WILLIAM P ,  ALLEN RICHARD G ,  DUBOIS THOMAS F ,  HACK GEORGE E ,  ANNUNZIATA EUGENE J ,  HOSKINSON WILLIAM C ,  KING LEWIS E ,  JOHANSEN THORE-JAN

IPC: G06F15/78 ,  G06F9/00 ,  G06F3/00 ,  G06F15/00

CPC classification number: G06F15/78

Abstract: The specification discloses an illustrative embodiment for the invention comprising a large-scale data processing system of the type which is composed of a plurality of quasi-independent units. The environmental data processing system includes a central processing unit or portion, which is herein referred to as a CPU, a plurality of storage units, a plurality of input/output control devices referred to herein as channels, as well as control and maintenance facilities which are found in a power distribution unit, herein referred to as a PDU. The CPU of the environmental system includes a control or instruction unit hereinafter referred to as an I-unit, and an arithmetic and logic or execution unit, hereinafter referred to as an E-unit. The I-unit includes controls for instruction fetching, branching, interruption handling, communication with the input/output channels, and other related functions. The E-unit of the environmental system can perform algebraic and logical operations, moving, shifting, and other functions.

公开(公告)号：US3374472A

公开(公告)日：1968-03-19

申请号：US60925267

申请日：1967-01-13

Applicant: IBM

Inventor： WISSICK WILLIAM P ,  HASBROUCK LEO J ,  RICHARD HOLLERAN CHARLES ,  SMITH GORDON L

IPC: G06F3/023 ,  G06F3/048 ,  G06F11/00 ,  G06F13/42

CPC classification number: G06F11/0751 ,  G06F3/0489 ,  G06F11/00 ,  G06F11/002 ,  G06F13/4234

Abstract: 1,133,848. Computers. INTERNATIONAL BUSINESS MACHINES CORP. 4 April, 1966 [5 April, 1965], No. 14756/66. Heading G4A. In a data processing system, detection of a predetermined condition causes (a) cancellation of a storage access and (b) accessing of data from panel keys, neither of events (a) and (b) ever occurring without the other. Storage access requests from input/output channel units and a central processing unit are resolved on a priority basis and the selected unit supplies an address word. An invalid address signal is produced if any of the 5 or 6 (depending on the number of storage units used) highest order bits of the address word is 1, except when only the highest order bit of the 5 or 6 is 1 in conjunction with the set position of an enabling control panel key. The invalid address signal is also produced if the selected storage unit is manually switched out of system for maintenance or if its power supply has failed. The storage access (which will have already started) is cancelled in any of the following circumstances and data is obtained from panel keys instead: (a) if a parity check on the address word, which includes 3 parity bits, indicates error, (b) if the invalid address signal is present and a disabling panel key is not set, (c) if the highest order bit of the address word is 1 and the enabling key mentioned is set, (d) in various resetting situations: Since only part of the address word is actually used for addressing, the part which is used (i.e. the whole word less the bits which if equal to 1 could give an invalid address indication) are supplied to the store together with 2 new parity bits derived from the part and one of the original parity bits, a parity check occurring at the store. The whole address word is also compared against panel keys if a further panel key so commands.

公开(公告)号：CA887341A

公开(公告)日：1971-11-30

申请号：CA887341D

Applicant: IBM

Inventor： GELLER ALAN R ,  SMITH GORDON L ,  HASBROUCK LEO J

公开(公告)号：CA791865A

公开(公告)日：1968-08-06

申请号：CA791865D

Applicant: IBM

Inventor： JOHANSEN THORE J ,  SMITH GORDON L ,  OSSOLINSKI EDWARD J

公开(公告)号：CA882937A

公开(公告)日：1971-10-05

申请号：CA882937D

Applicant: IBM

Inventor： OSSOLINSKI EDWARD J ,  HASBROUCK LEO J ,  SMITH GORDON L

公开(公告)号：CA786983A

公开(公告)日：1968-06-04

申请号：CA786983D

Applicant: IBM

Inventor： SMITH GORDON L

公开(公告)号：CA784884A

公开(公告)日：1968-05-07

申请号：CA784884D

Applicant: IBM

Inventor： WISSICK WILLIAM P ,  SMITH GORDON L ,  HASBROUCK LEO J ,  HOLLERAN C RICHARD