公开(公告)号：US6292718B2

公开(公告)日：2001-09-18

申请号：US44365899

申请日：1999-11-19

Applicant: IBM ,  SONY ELECTRONICS

Inventor： STAIGER DIETER E

IPC: G06F15/16 ,  B60R16/02 ,  B60R16/023 ,  G05B15/02 ,  G05B19/04 ,  G06F7/00

CPC classification number: B60R16/0231

Abstract: An electronic control system for controlling the function of a processing system is provided, especially for the use in an automotive vehicle, wherein said control system comprises a plurality of logical control elements, each of which is especially adapted to perform special tasks, whereby each of said control elements is able to communicate with every other control element.

Abstract translation: 提供了一种用于控制处理系统的功能的电子控制系统，特别是用于汽车中，其中所述控制系统包括多个逻辑控制元件，每个逻辑控制元件特别适于执行特殊任务， 所述控制元件能够与每个其他控制元件通信。

公开(公告)号：WO2004057431A3

公开(公告)日：2005-04-07

申请号：PCT/EP0312167

申请日：2003-10-31

Applicant: IBM ,  IBM DEUTSCHLAND ,  STAIGER DIETER E

Inventor： STAIGER DIETER E

IPC: B60R16/02 ,  B60R25/10 ,  B60W50/00 ,  G05B19/042 ,  H04L29/08

CPC classification number: G05B19/042 ,  B60W50/00 ,  B60W2050/0002 ,  G05B2219/2216 ,  G05B2219/25308 ,  G05B2219/2637

Abstract: The present invention relates to the field of embedded processing systems and electronic control units (ECUs)and to autonomic embedded computing solutions. The present invention proposes to remove or extract the application-specific support functions and respective I/O subsystems from the main processors or controllers of the system, to include said extracted circuits into a respective number of ASIC chips or the like, and to connect them preferably via a supervising General Controller Unit (12) to a plurality of standard and low-price processors (40), which have the task to supply the ASIC and the multiple functions thereof with enough computing power.

Abstract translation: 本发明涉及嵌入式处理系统和电子控制单元（ECU）以及自主嵌入式计算解决方案领域。 本发明提出从系统的主处理器或控制器中移除或提取特定于应用的支持功能和相应的I / O子系统，以将所述提取的电路包括在相应数量的ASIC芯片等中，并将它们连接 优选地通过监控总控制器单元（12）到多个标准和低价格处理器（40），其具有向ASIC提供其多个功能的足够的计算能力的任务。

公开(公告)号：WO02095581A3

公开(公告)日：2004-01-29

申请号：PCT/EP0204480

申请日：2002-04-24

Applicant: IBM ,  IBM DEUTSCHLAND

Inventor： STAIGER DIETER E

IPC: G06F9/44 ,  G06F9/445

CPC classification number: G06F9/4401

Abstract: An electronic system is provided having at least first and second sub-systems (24, 25, 26) and a memory (54) for storage of boot-images of the respective sub-systems. A controller 31 loads the boot-images stored in the memory (54) into the respective sub-systems (24, 25, 26) in sequential order via multiplexers (29, 41 and 48). This allows to utilize an inexpensive memory device for the memory (54) and to reduce the overall code size.

Abstract translation: 提供一种电子系统，其具有至少第一和第二子系统（24,25,26）和用于存储各个子系统的引导图像的存储器（54）。 控制器31通过多路复用器（29,41和48）以顺序的顺序将存储在存储器（54）中的引导图像加载到各个子系统（24,25,26）中。 这允许利用用于存储器（54）的便宜的存储器件并且减少总体代码尺寸。

公开(公告)号：DE60019038D1

公开(公告)日：2005-05-04

申请号：DE60019038

申请日：2000-07-12

Applicant: IBM

Inventor： EIBACH WOLFGANG ,  STAIGER DIETER E

IPC: G05B19/042 ,  G06F11/00 ,  B60R16/02

Abstract: A principle for handling system failure situations thereby maintaining minimum fault recovery time and providing high system availability is described, especially for controlling the system behavior in fault situations of Electronic Control Units used in automotive vehicles. This principle is providing unique solutions for fault analysis, fault recovery definition and system re-vitalization. It is a key attribute of the principle keeping the demand for hardware and software overhead at a minimum. The method applies graceful degradation of system functionality, allowing to achieve the implementation of cost effective systems.

公开(公告)号：AU2002302563A1

公开(公告)日：2002-12-03

申请号：AU2002302563

申请日：2002-04-24

Applicant: IBM

Inventor： STAIGER DIETER E

IPC: G06F9/44 ,  G06F9/4401 ,  G06F9/445

公开(公告)号：AT354820T

公开(公告)日：2007-03-15

申请号：AT03813553

申请日：2003-10-31

Applicant: IBM

Inventor： STAIGER DIETER E

IPC: B60R16/02 ,  B60R25/10 ,  B60W50/00 ,  G05B19/042 ,  H04L29/08

Abstract: The present invention relates to the field of embedded processing systems and electronic control units (ECUs) and to autonomic embedded computing solutions. The present invention proposes to remove or extract the application-specific support functions and respective I/O subsystems from the main processors or controllers of the system, to include said extracted circuits into a respective number of ASIC chips or the like, and to connect them preferably via a supervising General Controller Unit (12) to a plurality of standard and low-price processors (40), which have the task to supply the ASIC and the multiple functions thereof with enough computing power.

公开(公告)号：DE19709174A1

公开(公告)日：1998-09-24

申请号：DE19709174

申请日：1997-03-06

Applicant: IBM

Inventor： STAIGER DIETER E

IPC: G02B6/43 ,  H04B10/00 ,  H04B10/80 ,  H04B10/24 ,  H04B10/12 ,  H04B10/02 ,  G06F13/00 ,  H04L12/40

Abstract: The invention relates to a bi-directional optical data transfer system. The data is transferred by a diffuse light between several electronic components (22) with several transmission links, wherein each transmission link is provided with a covering (12) to prevent said transmission links from interfering with each other.

公开(公告)号：FR2406912A1

公开(公告)日：1979-05-18

申请号：FR7829353

申请日：1978-10-09

Applicant: IBM

Inventor： STAIGER DIETER E

IPC: G01R31/28 ,  G01R31/3183 ,  G01R31/319 ,  G06F1/04 ,  G06F11/22 ,  G11C29/00 ,  G11C29/10 ,  G11C29/56 ,  H03K3/64 ,  H03K3/72 ,  H03K3/78 ,  H03K21/36

Abstract: The process for the generation of pulse sequences which are not separated from each other in time is used for testing a memory. When a specific numerical value has been attained, pulse generation is initiated by a degressive counter which is controlled by clock pulses. The degressive counter may receive a starting value from a memory. Before the specific value has been attained, the resetting of the counter at a new starting value, also provided by the memory, is carried out. This occurs at the instant when the counter would normally have attained the value of zero in its program of counting.

公开(公告)号：DE19709174B4

公开(公告)日：2004-08-05

申请号：DE19709174

申请日：1997-03-06

Applicant: IBM

Inventor： STAIGER DIETER E

IPC: G02B6/43 ,  H04B10/00 ,  H04B10/80 ,  H04B10/24 ,  H04B10/12 ,  H04B10/02 ,  G06F13/00 ,  H04L12/40

Abstract: The invention relates to a bi-directional optical data transfer system. The data is transferred by a diffuse light between several electronic components with several transmission links, wherein each transmission link is provided with a covering to prevent the transmission links from interfering with each other.

公开(公告)号：DE10229945A1

公开(公告)日：2003-02-13

申请号：DE10229945

申请日：2002-07-04

Applicant: IBM

Inventor： STAIGER DIETER E ,  RIEKE REINER

IPC: G06F13/26 ,  G06F9/48

Abstract: Interrupt controller comprises parallel input (30) for receipt of a first interrupt request signal, means (31) for output of a second interrupt request signal as a reaction to the first interrupt request signal, state processing means (32) for determining interrupt priority, memory (37) for storing addresses of interrupt servicing programs whereby each servicing program handles an interrupt signal and means (36) for selection of an address based on the priority.