公开(公告)号：DE69131520T2

公开(公告)日：2000-03-30

申请号：DE69131520

申请日：1991-12-11

Applicant: IBM

Inventor： CRABBE EMMANUEL ,  MEYERSON BERNARD STEELE ,  STORK JOHANNES MARIA CORNELIS ,  VERDONCKT-VANDEBROEK SOPHIE

IPC: H01L29/78 ,  H01L21/335 ,  H01L29/10 ,  H01L29/161 ,  H01L29/165 ,  H01L29/778

公开(公告)号：DE69131520D1

公开(公告)日：1999-09-16

申请号：DE69131520

申请日：1991-12-11

Applicant: IBM

Inventor： CRABBE EMMANUEL ,  MEYERSON BERNARD STEELE ,  STORK JOHANNES MARIA CORNELIS ,  VERDONCKT-VANDEBROEK SOPHIE

IPC: H01L29/78 ,  H01L21/335 ,  H01L29/10 ,  H01L29/161 ,  H01L29/165 ,  H01L29/778

公开(公告)号：DE3869181D1

公开(公告)日：1992-04-23

申请号：DE3869181

申请日：1988-03-04

Applicant: IBM

Inventor： IYER SUBRAMANIAN SRIKANTESWARA ,  STORK JOHANNES MARIA CORNELIS

IPC: H01L29/73 ,  H01L21/033 ,  H01L21/203 ,  H01L21/331 ,  H01L21/762 ,  H01L29/732 ,  H01L21/76 ,  H01L21/285

Abstract: A process for fabricating a bipolar transistor structure having device and isolation regions fully self-aligned. The transistor is fabricated using a process wherein collector (12), base (14) and emitter (16) layers are sequentially formed on a semiconductor substrate (10) by a molecular beam epitaxy technique. The emitter layer is covered by insulation layers and a photoresist layer is then formed on the insulation layer. The photoresist layer is masked, exposed and developed to provide a pattern which is used as an etch mask to form both the device emitter area (26) and isolation areas (28). The isolation areas (28), the emitter region (26) and the base (14) and collector (12) regions are therefore formed.