公开(公告)号：DE69220169T2

公开(公告)日：1997-12-18

申请号：DE69220169

申请日：1992-08-28

Applicant: IBM

Inventor： MURRAY JACK THOMAS ,  UNGERBOECK GOTTFRIED ,  WARE MALCOLM SCOTT

IPC: H04L27/00 ,  H04L27/22 ,  H04L25/38

公开(公告)号：DE69427135T2

公开(公告)日：2001-09-13

申请号：DE69427135

申请日：1994-12-28

Applicant: IBM

Inventor： CHERUBINI GIOVANNI ,  OELCER SEDAT ,  UNGERBOECK GOTTFRIED

IPC: H03H21/00 ,  H04B3/06 ,  H04L25/03 ,  H04L25/497

公开(公告)号：HK138294A

公开(公告)日：1994-12-16

申请号：HK138294

申请日：1994-12-08

Applicant: IBM

Inventor： DOLLVO FRANCOIS BERNARD ,  UNGERBOECK GOTTFRIED ,  HOWELL THOMAS DAVID

IPC: H04L25/03 ,  H04L25/08 ,  H04L25/497 ,  G11B11/20 ,  G11B20/10

Abstract: A maximum-likelihood sequence decoder is used with a partial-response signaling system for processing sequences of sampled values from a communication channel or recording device. The partial-response signals can be duobinary, dicode, or partial-response class-IV. The maximum-likelihood decoding for each sequence is based upon a two-state trellis. lnstead of two survivor metrics for the two states, only a difference metric is generated which is simpler but sufficient for the decoding process. The decoder comprises survivor metric determining circuitry (81...99) which, from each input sample (y n ) and a previous difference metric (DJ n - 3 ) determines a new difference metric (DJ n-1 ), two additional binary values (b + , b-) for the two survivor sequences, as well as a binary output value (b) for making a selection among the two survivor sequences.

公开(公告)号：SG150594G

公开(公告)日：1995-03-17

申请号：SG150594

申请日：1994-10-17

Applicant: IBM

Inventor： DOLIVO FRANCOIS BERNARD ,  UNGERBOECK GOTTFRIED ,  HOWELL THOMAS DAVID

IPC: H04L25/03 ,  H04L25/08 ,  H04L25/497 ,  G11B11/20

Abstract: A maximum-likelihood sequence decoder is used with a partial-response signaling system for processing sequences of sampled values from a communication channel or recording device. The partial-response signals can be duobinary, dicode, or partial-response class-IV. The maximum-likelihood decoding for each sequence is based upon a two-state trellis. lnstead of two survivor metrics for the two states, only a difference metric is generated which is simpler but sufficient for the decoding process. The decoder comprises survivor metric determining circuitry (81...99) which, from each input sample (y n ) and a previous difference metric (DJ n - 3 ) determines a new difference metric (DJ n-1 ), two additional binary values (b + , b-) for the two survivor sequences, as well as a binary output value (b) for making a selection among the two survivor sequences.

公开(公告)号：DE3778549D1

公开(公告)日：1992-05-27

申请号：DE3778549

申请日：1987-11-13

Applicant: IBM

Inventor： DOLIVO FRANCOIS BERNARD ,  UNGERBOECK GOTTFRIED

IPC: H04L25/40 ,  G11B20/10 ,  G11B20/14 ,  H04L7/02 ,  H04L7/04 ,  H04L7/10 ,  H04L25/34 ,  H04L25/49 ,  H04L25/497

Abstract: In a receiver for data having been sent or recorded as partial-response (PR) signals, there is a system for generating a timing gradient value for initially acquiring the sampling phase when a signal resulting from the transmission of a known preamble is received. A common input (55) receives signal samples Yn of a transmitted or recorded PR signal. A delay circuit (67) has a delay stage, for accepting the present received signal sample Yn and provides at least one previous received signal sample Yn-i. A second delay circuit (61) has at least two delay stages, for accepting a present reconstructed data sample Xn and provides at least a first previous reconstructed data sample Xn-j. A reconstruction circuit (43) is connected to the common input and to the second delay circuit for generating the present reconstructed data sample Xn in response to the present received signal sample Yn and the first previous reconstructed data sample Xn-j. A timing gradient generation circuit (41) is connected to the common input and to the delay circuits for generating the timing gradient value.

公开(公告)号：FR2355409A1

公开(公告)日：1978-01-13

申请号：FR7714009

申请日：1977-05-03

Applicant: IBM

Inventor： CSAJKA ISTVAN P ,  UNGERBOECK GOTTFRIED

IPC: H04L27/38 ,  H04L27/00 ,  H04L27/18 ,  H04L27/20 ,  H03K7/00

Abstract: A method and structure for converting a sequence of binary digits into a sequence of discrete signal values, e.g., phase values, of a modulated carrier signal for data transmission. By introducing additional redundant signal values and coding information in a state-dependent sequential manner, enlarged minimum Euclidian distance between possible signal value sequences is achieved which results in a reduced error probability when maximum-likelihood decoding is applied in the receiver.

公开(公告)号：DE2627446B1

公开(公告)日：1977-04-28

申请号：DE2627446

申请日：1976-06-18

Applicant: IBM

Inventor： KAESER HANS-PETER ,  UNGERBOECK GOTTFRIED ,  THIRION PHILIPPE

IPC: H03H17/08 ,  H04L27/00 ,  H04L27/22 ,  H04L27/227

公开(公告)号：DE69125816T2

公开(公告)日：1997-10-23

申请号：DE69125816

申请日：1991-02-21

Applicant: IBM

Inventor： BLANC ALAIN ,  GOHL-ROUX SYLVIE ,  UNGERBOECK GOTTFRIED

IPC: H04L5/00 ,  H04L27/00 ,  H04L29/06 ,  H04L29/10

Abstract: DCE and method for performing the processing of data into a DCE, and DCE which includes a digital signal processor DSP (202) for processing the data transmitted between a Data terminating equipment DTE (209) and a telecommunication line, transmit (213) and receive (214) circuits being connected to the DTE interface. The DCE further includes A/D (215) and a D/A converters (216) for respectively converting the data from an analog form to Pulse Coded Modulation PCM words and from PCM words to an analog form and also a control processor (200) for controlling the communication protocols and a storage (204) which is connected to both the DSP processor (202) and the control processor (200). The method is characterized in that it involves the steps of storing (403) by means of said DSP processor (202) the bits provided by said transmit circuit (213) into a first queue (300) which is located into said storage (204) and storing (507) into a second queue (304) which is also located into the same storage (204) the characters being computed by said DSP processor (202) and deriving from the bits stored into said first queue (300) accordingly to a first given transmission protocol being either a start-stop, a HDLC or a BSC transmission protocol. The method further involves the step of storing (513) into a third queue (307) which is located into the same storage as above the characters being provided by said control processor (200) in order to be transmitted to a remote DCE via the telecommunication line. A further step is involved which is the storing (513) into a fourth queue (309) which is still located into the storage (204) the bits being computed by said DSP processor (202) and deriving from the characters stored into said third queue (307) accordingly to a second given transmission protocol. the transmission of data through the telecommunication line is achieved by storing into a fifth queue (302) the PCM words which are computed by said DSP processor (202) in accordance with a given modulation algorithm, the PCM words being derived either from the contents of said first (300) queue in synchronous mode or from the contents of the third (307) queue when the transmit part of the DCE is intended to operate in an asynchronous mode or still when the control processor (200) wishes to transmit data through the telecommunication line. The selection of an appropriate transmission protocol, chosen the existing protocols such as start-stop, HDLC, BSC, as well as the selection of the appropriate modulation algorithm provides a method for processing data to be transmitted from a DTE to a telecommunication line which allows a large number of configuration without requiring the great number of electronic components which were usually necessary. The invention also provides the receive part of the DCE.

公开(公告)号：DE69220169D1

公开(公告)日：1997-07-10

申请号：DE69220169

申请日：1992-08-28

Applicant: IBM

Inventor： MURRAY JACK THOMAS ,  UNGERBOECK GOTTFRIED ,  WARE MALCOLM SCOTT

IPC: H04L27/00 ,  H04L27/22 ,  H04L25/38

公开(公告)号：CA2060976A1

公开(公告)日：1992-08-22

申请号：CA2060976

申请日：1992-02-11

Applicant: IBM

Inventor： BLANC ALAIN ,  GOHL-ROUX SYLVIE ,  UNGERBOECK GOTTFRIED

IPC: H04L5/00 ,  H04L27/00 ,  H04L29/06 ,  H04L29/10

Abstract: DCE and method for performing the processing of data into a DCE, and DCE which includes a digital signal processor DSP (202) for processing the data transmitted between a Data terminating equipment DTE (209) and a telecommunication line, transmit (213) and receive (214) circuits being connected to the DTE interface. The DCE further includes A/D (215) and a D/A converters (216) for respectively converting the data from an analog form to Pulse Coded Modulation PCM words and from PCM words to an analog form and also a control processor (200) for controlling the communication protocols and a storage (204) which is connected to both the DSP processor (202) and the control processor (200). The method is characterized in that it involves the steps of storing (403) by means of said DSP processor (202) the bits provided by said transmit circuit (213) into a first queue (300) which is located into said storage (204) and storing (507) into a second queue (304) which is also located into the same storage (204) the characters being computed by said DSP processor (202) and deriving from the bits stored into said first queue (300) accordingly to a first given transmission protocol being either a start-stop, a HDLC or a BSC transmission protocol. The method further involves the step of storing (513) into a third queue (307) which is located into the same storage as above the characters being provided by said control processor (200) in order to be transmitted to a remote DCE via the telecommunication line. A further step is involved which is the storing (513) into a fourth queue (309) which is still located into the storage (204) the bits being computed by said DSP processor (202) and deriving from the characters stored into said third queue (307) accordingly to a second given transmission protocol. the transmission of data through the telecommunication line is achieved by storing into a fifth queue (302) the PCM words which are computed by said DSP processor (202) in accordance with a given modulation algorithm, the PCM words being derived either from the contents of said first (300) queue in synchronous mode or from the contents of the third (307) queue when the transmit part of the DCE is intended to operate in an asynchronous mode or still when the control processor (200) wishes to transmit data through the telecommunication line. The selection of an appropriate transmission protocol, chosen the existing protocols such as start-stop, HDLC, BSC, as well as the selection of the appropriate modulation algorithm provides a method for processing data to be transmitted from a DTE to a telecommunication line which allows a large number of configuration without requiring the great number of electronic components which were usually necessary. The invention also provides the receive part of the DCE.