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    Fft processor with unique addressing
    1.
    发明授权
    Fft processor with unique addressing 失效
    FFT处理器具有独特的寻址功能

    公开(公告)号：US3673399A

    公开(公告)日：1972-06-27

    申请号：US3673399D

    申请日：1970-05-28

    Applicant: IBM

    Inventor： HANCKE PETER J ,  JUDKOVICS MONROE ,  URQUHART ROBERT J

    IPC: G06F17/14 ,  G06F7/38

    CPC classification number: G06F17/142

    Abstract: A real time digital Fourier analyzer using the Cooley-Tukey algorithm for calculating the Fast Fourier Transform. An arithmetic unit simultaneously performs the two complex calculations Ar Br + Wr Cr and A(r n/2) Br - Wr Cr. The calculated results are simultaneously stored and retrieved in an in-place operation in dual buffers in successive iterations. Addressing of the buffers uses a single binary address counter and sequential bit complementing for simultaneously addressing both buffers. Parity checking of the binary counter output address controls multiplexing logic to selectively address the buffers to store the calculated results into the desired buffer storage locations.

    Abstract translation: 一种使用Cooley-Tukey算法计算快速傅立叶变换的实时数字傅里叶分析仪。 算术单元同时执行两个复数计算Ar = Br + Wr Cr和A（r + n / 2）= Br-Wr Cr。 计算结果在连续迭代中以双缓冲器的就地操作同时存储和检索。 缓冲器的寻址使用单个二进制地址计数器和顺序位补码来同时寻址两个缓冲区。 二进制计数器输出地址的奇偶校验控制多路复用逻辑以选择性地寻址缓冲器以将计算出的结果存储到期望的缓冲存储位置。

    Method and apparatus for autonomic test case feedback using hardware assistance for code coverage
    4.
    发明专利
    Method and apparatus for autonomic test case feedback using hardware assistance for code coverage 有权
    使用硬件辅助代码覆盖的自动测试案例反馈的方法和装置

    公开(公告)号：JP2005276201A

    公开(公告)日：2005-10-06

    申请号：JP2005077200

    申请日：2005-03-17

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： ROBERT TOD DIMPSEY ,  FRANK ELLIOTT LEVINE ,  URQUHART ROBERT J

    IPC: G06F11/28 ,  G06F11/00 ,  G06F11/32 ,  G06F11/36

    CPC classification number: G06F11/3676

    Abstract: PROBLEM TO BE SOLVED: To provide a method, apparatus and computer instructions for presenting coverage data for code. SOLUTION: The coverage data containing instruction access indicators associated with the code are obtained. Particular instruction access indicators that have been set by a processor in the data processing system in response to execution of the code by the processor are identified to form set instruction access indicators. Each set instruction access indicator is associated with a portion of the code. A presentation for the coverage data is generated. The set instruction access indicators are identified in the presentation. This presentation may be, for example, a graphical presentation. COPYRIGHT: (C)2006,JPO&NCIPI

    Abstract translation: 要解决的问题：提供用于呈现代码的覆盖数据的方法，装置和计算机指令。

    解决方案：获取包含与代码相关联的指令访问指示符的覆盖数据。 识别由数据处理系统中的处理器响应于处理器执行代码而设置的特定指令访问指示符，以形成设置指令访问指示符。 每个设置的指令访问指示符与代码的一部分相关联。 生成覆盖数据的演示文稿。 演示文稿中指定了设置的指令访问指示符。 该呈现可以是例如图形呈现。 版权所有（C）2006，JPO＆NCIPI

    Method, system and program for counting interrupt by type
    6.
    发明专利
    Method, system and program for counting interrupt by type 审中-公开
    方法，系统和程序计数中断类型

    公开(公告)号：JP2005202964A

    公开(公告)日：2005-07-28

    申请号：JP2005006931

    申请日：2005-01-13

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： DEWITT JIMMIE EARL JR ,  FRANK ELLIOTT LEVIN ,  RICHARDSON CHRISTOPHER M ,  URQUHART ROBERT J

    IPC: G06F12/08 ,  G06F11/34 ,  G06F12/10 ,  G06F13/24

    CPC classification number: G06F13/24

    Abstract: PROBLEM TO BE SOLVED: To provide a method, an apparatus and a system for counting interrupts by type; and to provide a computer program having instructions for counting interrupts by type. SOLUTION: An interrupt count is incremented when a particular type of interrupt occurs. The count may be stored in an IDT (interrupt descriptor table) or an interrupt count table (ICT) outside the IDT. An interrupt unit increments the count each time a particular type of interrupt occurs. In the event of a potential count overflow, the mechanism of this application provides logic necessary to notify software in order to handle the overflow. COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题：提供一种通过类型对中断进行计数的方法，装置和系统; 并提供具有用于按类型计数中断的指令的计算机程序。

    解决方案：当发生特定类型的中断时，中断计数递增。 计数可以存储在IDT外的IDT（中断描述符表）或中断计数表（ICT）中。 每当发生特定类型的中断时，中断单元递增计数。 在潜在计数溢出的情况下，此应用程序的机制提供了通知软件以处理溢出所需的逻辑。 版权所有（C）2005，JPO＆NCIPI

    Z-BUFFER QUANTIZATION OF THREE-DIMENSIONAL LINES
    8.
    发明专利
    Z-BUFFER QUANTIZATION OF THREE-DIMENSIONAL LINES 未知

    公开(公告)号：CA2043176C

    公开(公告)日：1995-09-26

    申请号：CA2043176

    申请日：1991-05-24

    Applicant: IBM

    Inventor： ALBAUGH VIRGIL A ,  URQUHART ROBERT J

    IPC: G06F3/153 ,  G06T15/40 ,  G06T17/20 ,  G06T17/30

    Abstract: A method and apparatus is provided which allows a computer graphics system to accurately determine the actual depth value for pixels on a display screen which lie at the same depth as an associated surface. The associated surface is identified such that the delta z value with respect to the x and y direction along the surface can be calculated. The present invention then determines whether the line being considered is contained within a surface, or is an edge lying between, and adjacent to two surfaces. If the line is contained within a surface, the delta z value is initially added to the known endpoints of the line and then successively added, in the incremental x or y directions, to the pixels selected to represent the line. If the line is an edge, and includes selected pixels which lie on both associated surfaces, a filter is invoked that prevents those pixels corresponding to the surface, other than the surface first being considered, from being processed. The pixels being considered are then drawn in the same manner as a line within a surface. In this manner, the actual z value for each selected pixel can be determined and any hidden line, hidden surface removal problems are eliminated.

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