-
公开(公告)号:FI93585B
公开(公告)日:1995-01-13
申请号:FI880656
申请日:1988-02-12
Applicant: IBM
Inventor: HEATH CHESTER ASBURY , LANGGOOD JOHN KENNEDY , VALLI RONALD EUGENE
IPC: G06F1/00 , G06F1/18 , G06F13/14 , G06F1/24 , G06F9/44 , G06F9/445 , G06F11/22 , G06F12/06 , G06F15/177 , G06K17/00
Abstract: A data processing system includes a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device, and each card is pre-wired with an ID value corresponding to its card type. Programmable option registers on each card store parameters such as address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in socket locations in main memory, one location being assigned to each input/output socket. Each socket location is adapted to hold the parameters associated with the card inserted in its respective socket and the card ID value. That portion of main memory containing the socket locations is adapted to maintain the parameter and ID information by means of battery power when system power fails or is disconnected, i.e., a non-volatile memory portion. Subsequent power-on routines are simplified by merely transferring parameters from the memory to the card registers if the status of all the sockets has not changed since the last power-down.
-
公开(公告)号:DE3808168C2
公开(公告)日:1988-12-22
申请号:DE3808168
申请日:1988-03-11
Applicant: IBM
Inventor: HEATH CHESTER ASBURY , LANGGOOD JOHN KENNEDY , VALLI RONALD EUGENE
IPC: G06F13/14 , G06F1/00 , G06F1/18 , G06F1/24 , G06F9/44 , G06F9/445 , G06F11/22 , G06F12/06 , G06F15/177 , G06K17/00
Abstract: A data processing system includes a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device, and each card is pre-wired with an ID value corresponding to its card type. Programmable option registers on each card store parameters such as address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in socket locations in main memory, one location being assigned to each input/output socket. Each socket location is adapted to hold the parameters associated with the card inserted in its respective socket and the card ID value. That portion of main memory containing the socket locations is adapted to maintain the parameter and ID information by means of battery power when system power fails or is disconnected, i.e., a non-volatile memory portion. Subsequent power-on routines are simplified by merely transferring parameters from the memory to the card registers if the status of all the sockets has not changed since the last power-down.
-
公开(公告)号:NO880605A
公开(公告)日:1988-09-14
申请号:NO880605
申请日:1988-02-11
Applicant: IBM
Inventor: HEATH CHESTER ASBURY , LANGGOOD JOHN KENNEDY , VALLI RONALD EUGENE
IPC: G06F13/14 , G06F1/00 , G06F1/18 , G06F1/24 , G06F9/445 , G06F11/22 , G06F15/177 , G06K17/00 , G06F13/00
CPC classification number: G06F11/2289 , G06F1/183 , G06F9/4411 , G06F15/177
-
公开(公告)号:FI880656A0
公开(公告)日:1988-02-12
申请号:FI880656
申请日:1988-02-12
Applicant: IBM
Inventor: HEATH CHESTER ASBURY , LANGGOOD JOHN KENNEDY , VALLI RONALD EUGENE
IPC: G06F1/00 , G06F13/14 , G06F1/18 , G06F1/24 , G06F9/44 , G06F9/445 , G06F11/22 , G06F12/06 , G06F15/177 , G06K17/00 , G06F
Abstract: A data processing system includes a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device, and each card is pre-wired with an ID value corresponding to its card type. Programmable option registers on each card store parameters such as address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in socket locations in main memory, one location being assigned to each input/output socket. Each socket location is adapted to hold the parameters associated with the card inserted in its respective socket and the card ID value. That portion of main memory containing the socket locations is adapted to maintain the parameter and ID information by means of battery power when system power fails or is disconnected, i.e., a non-volatile memory portion. Subsequent power-on routines are simplified by merely transferring parameters from the memory to the card registers if the status of all the sockets has not changed since the last power-down.
-
公开(公告)号:DE3881414T2
公开(公告)日:1993-12-23
申请号:DE3881414
申请日:1988-03-08
Applicant: IBM
Inventor: HEATH CHESTER ASBURY , LANGGOOD JOHN KENNEDY , VALLI RONALD EUGENE
IPC: G06F13/14 , G06F1/00 , G06F1/18 , G06F1/24 , G06F9/44 , G06F9/445 , G06F11/22 , G06F12/06 , G06F15/177 , G06K17/00
Abstract: A data processing system includes a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device, and each card is pre-wired with an ID value corresponding to its card type. Programmable option registers on each card store parameters such as address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in socket locations in main memory, one location being assigned to each input/output socket. Each socket location is adapted to hold the parameters associated with the card inserted in its respective socket and the card ID value. That portion of main memory containing the socket locations is adapted to maintain the parameter and ID information by means of battery power when system power fails or is disconnected, i.e., a non-volatile memory portion. Subsequent power-on routines are simplified by merely transferring parameters from the memory to the card registers if the status of all the sockets has not changed since the last power-down.
-
公开(公告)号:NZ236503A
公开(公告)日:1992-09-25
申请号:NZ23650388
申请日:1988-02-09
Applicant: IBM
Inventor: HEATH CHESTER ASBURY , LANGGOOD JOHN KENNEDY , VALLI RONALD EUGENE
-
公开(公告)号:IN171349B
公开(公告)日:1992-09-19
申请号:IN49DE1988
申请日:1988-01-20
Applicant: IBM
Inventor: HEATH CHESTER ASBURY , LANGGOOD JOHN KENNEDY , VALLI RONALD EUGENE
IPC: G06F15/00
-
公开(公告)号:GB2202350A
公开(公告)日:1988-09-21
申请号:GB8805328
申请日:1988-03-07
Applicant: IBM
Inventor: HEATH CHESTER ASBURY , LANGGODD JOHN KENNEDY , VALLI RONALD EUGENE
IPC: G06F1/00 , G06F1/18 , G06F13/14 , G06F1/24 , G06F9/44 , G06F9/445 , G06F11/22 , G06F12/06 , G06F15/177 , G06K17/00
Abstract: A data processing system includes a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device, and each card is pre-wired with an ID value corresponding to its card type. Programmable option registers on each card store parameters such as address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in socket locations in main memory, one location being assigned to each input/output socket. Each socket location is adapted to hold the parameters associated with the card inserted in its respective socket and the card ID value. That portion of main memory containing the socket locations is adapted to maintain the parameter and ID information by means of battery power when system power fails or is disconnected, i.e., a non-volatile memory portion. Subsequent power-on routines are simplified by merely transferring parameters from the memory to the card registers if the status of all the sockets has not changed since the last power-down.
-
公开(公告)号:AU1273888A
公开(公告)日:1988-09-15
申请号:AU1273888
申请日:1988-03-07
Applicant: IBM
Inventor: HEATH CHESTER ASBURY , LANGGOOD JOHN KENNEDY , VALLI RONALD EUGENE
IPC: G06F13/14 , G06F1/00 , G06F1/18 , G06F1/24 , G06F9/44 , G06F9/445 , G06F11/22 , G06F12/06 , G06F15/177 , G06K17/00 , G06F12/16 , G06F13/12 , G06F12/00
Abstract: A data processing system includes a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device, and each card is pre-wired with an ID value corresponding to its card type. Programmable option registers on each card store parameters such as address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in socket locations in main memory, one location being assigned to each input/output socket. Each socket location is adapted to hold the parameters associated with the card inserted in its respective socket and the card ID value. That portion of main memory containing the socket locations is adapted to maintain the parameter and ID information by means of battery power when system power fails or is disconnected, i.e., a non-volatile memory portion. Subsequent power-on routines are simplified by merely transferring parameters from the memory to the card registers if the status of all the sockets has not changed since the last power-down.
-
公开(公告)号:DK135888D0
公开(公告)日:1988-03-11
申请号:DK135888
申请日:1988-03-11
Applicant: IBM
Inventor: HEATH CHESTER ASBURY , LANGGOOD JOHN KENNEDY , VALLI RONALD EUGENE
IPC: G06F1/00 , G06F1/18 , G06F13/14 , G06F1/24 , G06F9/44 , G06F9/445 , G06F11/22 , G06F12/06 , G06F15/177 , G06K17/00 , G06F12/00 , G06F13/00
Abstract: A data processing system includes a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device, and each card is pre-wired with an ID value corresponding to its card type. Programmable option registers on each card store parameters such as address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in socket locations in main memory, one location being assigned to each input/output socket. Each socket location is adapted to hold the parameters associated with the card inserted in its respective socket and the card ID value. That portion of main memory containing the socket locations is adapted to maintain the parameter and ID information by means of battery power when system power fails or is disconnected, i.e., a non-volatile memory portion. Subsequent power-on routines are simplified by merely transferring parameters from the memory to the card registers if the status of all the sockets has not changed since the last power-down.
-
-
-
-
-
-
-
-
-