公开(公告)号：FI93585B

公开(公告)日：1995-01-13

申请号：FI880656

申请日：1988-02-12

Applicant: IBM

Inventor： HEATH CHESTER ASBURY ,  LANGGOOD JOHN KENNEDY ,  VALLI RONALD EUGENE

IPC: G06F1/00 ,  G06F1/18 ,  G06F13/14 ,  G06F1/24 ,  G06F9/44 ,  G06F9/445 ,  G06F11/22 ,  G06F12/06 ,  G06F15/177 ,  G06K17/00

Abstract: A data processing system includes a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device, and each card is pre-wired with an ID value corresponding to its card type. Programmable option registers on each card store parameters such as address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in socket locations in main memory, one location being assigned to each input/output socket. Each socket location is adapted to hold the parameters associated with the card inserted in its respective socket and the card ID value. That portion of main memory containing the socket locations is adapted to maintain the parameter and ID information by means of battery power when system power fails or is disconnected, i.e., a non-volatile memory portion. Subsequent power-on routines are simplified by merely transferring parameters from the memory to the card registers if the status of all the sockets has not changed since the last power-down.

公开(公告)号：DE3808168C2

公开(公告)日：1988-12-22

申请号：DE3808168

申请日：1988-03-11

Applicant: IBM

Inventor： HEATH CHESTER ASBURY ,  LANGGOOD JOHN KENNEDY ,  VALLI RONALD EUGENE

IPC: G06F13/14 ,  G06F1/00 ,  G06F1/18 ,  G06F1/24 ,  G06F9/44 ,  G06F9/445 ,  G06F11/22 ,  G06F12/06 ,  G06F15/177 ,  G06K17/00

Abstract: A data processing system includes a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device, and each card is pre-wired with an ID value corresponding to its card type. Programmable option registers on each card store parameters such as address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in socket locations in main memory, one location being assigned to each input/output socket. Each socket location is adapted to hold the parameters associated with the card inserted in its respective socket and the card ID value. That portion of main memory containing the socket locations is adapted to maintain the parameter and ID information by means of battery power when system power fails or is disconnected, i.e., a non-volatile memory portion. Subsequent power-on routines are simplified by merely transferring parameters from the memory to the card registers if the status of all the sockets has not changed since the last power-down.

公开(公告)号：NO880605A

公开(公告)日：1988-09-14

申请号：NO880605

申请日：1988-02-11

Applicant: IBM

Inventor： HEATH CHESTER ASBURY ,  LANGGOOD JOHN KENNEDY ,  VALLI RONALD EUGENE

IPC: G06F13/14 ,  G06F1/00 ,  G06F1/18 ,  G06F1/24 ,  G06F9/445 ,  G06F11/22 ,  G06F15/177 ,  G06K17/00 ,  G06F13/00

CPC classification number: G06F11/2289 ,  G06F1/183 ,  G06F9/4411 ,  G06F15/177

公开(公告)号：FI880656A0

公开(公告)日：1988-02-12

申请号：FI880656

申请日：1988-02-12

Applicant: IBM

Inventor： HEATH CHESTER ASBURY ,  LANGGOOD JOHN KENNEDY ,  VALLI RONALD EUGENE

IPC: G06F1/00 ,  G06F13/14 ,  G06F1/18 ,  G06F1/24 ,  G06F9/44 ,  G06F9/445 ,  G06F11/22 ,  G06F12/06 ,  G06F15/177 ,  G06K17/00 ,  G06F

Abstract: A data processing system includes a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device, and each card is pre-wired with an ID value corresponding to its card type. Programmable option registers on each card store parameters such as address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in socket locations in main memory, one location being assigned to each input/output socket. Each socket location is adapted to hold the parameters associated with the card inserted in its respective socket and the card ID value. That portion of main memory containing the socket locations is adapted to maintain the parameter and ID information by means of battery power when system power fails or is disconnected, i.e., a non-volatile memory portion. Subsequent power-on routines are simplified by merely transferring parameters from the memory to the card registers if the status of all the sockets has not changed since the last power-down.

公开(公告)号：BR8401006A

公开(公告)日：1984-10-16

申请号：BR8401006

申请日：1984-03-01

Applicant: IBM

Inventor： BREWER JAMES ARTHUR ,  KUMMER DAVID ALLEN ,  LANGGOOD JOHN KENNEDY

IPC: H05K1/00 ,  H05K1/02 ,  H05K7/02 ,  H01L23/50

Abstract: A six-layer printed circuit card has first, third and sixth layers which are signal carrying layers for interconnecting various components forming a personal computer. The second and fifth layers are both ground plane layers and the fourth layer of the card is a voltage plane. The components on the printed circuit card include eight input/output (I/O) connectors J1 - J8 to which eight other cards controlling various I/O devices can be connected. Seven of the eight I/O connectors are interconnected to a conventional I/O bus. The eighth connector J8 is interconnected to some lines of the I/O bus and to some lines of the signal carrying layers which form an internal bus.

公开(公告)号：BR8401005A

公开(公告)日：1984-10-16

申请号：BR8401005

申请日：1984-03-01

Applicant: IBM

Inventor： BREWER JAMES ARTHUR ,  LANGGOOD JOHN KENNEDY ,  MARKHAM HARVEY ROSSEN

IPC: H05K9/00 ,  H05K1/00 ,  H05K1/02 ,  H05K3/46 ,  H05K7/02 ,  H01L23/50

公开(公告)号：IT8419882D0

公开(公告)日：1984-03-02

申请号：IT1988284

申请日：1984-03-02

Applicant: IBM

Inventor： BREWER JAMES ARTHUR ,  LANGGOOD JOHN KENNEDY ,  MARKHAM HARVEY ROSSEN

IPC: H05K1/00 ,  H05K1/02 ,  H05K

Abstract: A six-layer printed circuit card has first, third and sixth layers which are signal carrying layers for interconnecting various components forming a personal computer. The second and fifth layers are both ground plane layers and the fourth layer of the card is a voltage plane. The components on the printed circuit card include eight input/output (I/O) connectors J1 - J8 to which eight other cards controlling various I/O devices can be connected. Seven of the eight I/O connectors are interconnected to a conventional I/O bus. The eighth connector J8 is interconnected to some lines of the I/O bus and to some lines of the signal carrying layers which form an internal bus.

公开(公告)号：MY134225A

公开(公告)日：2007-11-30

申请号：MYPI9300432

申请日：1988-02-15

Applicant: IBM

Inventor： HEATH CHESTER ASBURY ,  LANGGOOD JOHN KENNEDY ,  VALLI RONALD EUGENE

IPC: G06F13/00 ,  G06F1/00 ,  G06F13/14 ,  G06F1/18 ,  G06F1/24 ,  G06F7/04 ,  G06F9/44 ,  G06F9/445 ,  G06F11/22 ,  G06F12/06 ,  G06F15/177 ,  G06K17/00

Abstract: A DATA PROCESSING SYSTEM INCLUDES A PLANAR BOARD HAVING A CENTRAL PROCESSING UNIT (CPU), A MAIN MEMORY UNIT, AND INPUT /OUTPUT (I/O) SOCKETS OR SLOTS, EACH ADAPTED TO RECEIVE A SELECTED ONE OF A PLURALITY OF DIFFERENT AND/ OR SIMILAR OPTION CARDS. EACH CARD CONTAINS (OR IS CONNECTED TO) AND CONTROLS A RESPECTIVE PERIPHERAL DEVICE ; AND EACH CARD IS PRE-WIRED WITH AN ID VALUE CORRESPONDING TO ITS CARD TYPE. SOFTWARE PROGRAMMABLE OPTION REGISTERS ON EACH CARD STORE PARAMETERS SUCH AS DESIGNATED DEFAULT (OR ALTERNATE) ADDRESS INFORMATION, PRIORITY LEVELS, AND OTHER SYSTEM RESOURCE PARAMETERS. SETUP ROUTINE, DURING INITIAL POWER-ON, RETRIEVES AND STORES THE APPROPRIATE PARAMETERS IN THE I/O CARDS AND ALSO IN SLOT POSITIONS IN MAIN MEMORY, ONE POSITION BEING ASSIGNED TO EACH SLOT ON THE BOARD. EACH SLOT POSITION IS ADAPTED TO HOLD THE PARAMETERS ASSOCIATED WITH THE CARD INSERTED IN ITS RESPECTIVE SLOT AND THE CARD ID VALUE. THAT PORTION OF MAIN MEMORY CONTAINING THE SLOT POSITIONS IS ADAPTED TO MAINTAIN THE PARAMETER AND ID INFORMATION BY MEANS OF BATTERY POWER WHEN SYSTEM POWER FAILS OR IS DISCONNECTED, I.E., A NONVOLATILE MEMORY PORTION. SUBSEQUENT TRANSFERRING PARAMETERS FROM THE TABLE TO THE CARD OPTION REGISTERS IF THE STATUS OF ALL THE SLOTS HAS NOT NOT CHANGED SINCE THE LAST POWER-DOWN, SYSTEM RESET, OR CHANNEL RESET.

公开(公告)号：HK1004298A1

公开(公告)日：1998-11-20

申请号：HK98103444

申请日：1998-04-24

Applicant: IBM

Inventor： HEATH CHESTER ASBURY ,  LANGGOOD JOHN KENNEDY ,  VALLI RONALD EUGENE

IPC: G06F1/00 ,  G06F13/14 ,  G06F1/18 ,  G06F1/24 ,  G06F9/44 ,  G06F9/445 ,  G06F11/22 ,  G06F12/06 ,  G06F15/177 ,  G06K17/00 ,  G06F

Abstract: A data processing system includes a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device, and each card is pre-wired with an ID value corresponding to its card type. Programmable option registers on each card store parameters such as address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in socket locations in main memory, one location being assigned to each input/output socket. Each socket location is adapted to hold the parameters associated with the card inserted in its respective socket and the card ID value. That portion of main memory containing the socket locations is adapted to maintain the parameter and ID information by means of battery power when system power fails or is disconnected, i.e., a non-volatile memory portion. Subsequent power-on routines are simplified by merely transferring parameters from the memory to the card registers if the status of all the sockets has not changed since the last power-down.

公开(公告)号：NO175879C

公开(公告)日：1994-12-21

申请号：NO880605

申请日：1988-02-11

Applicant: IBM

Inventor： HEATH CHESTER ASBURY ,  LANGGOOD JOHN KENNEDY ,  VALLI RONALD EUGENE

IPC: G06F1/00 ,  G06F1/18 ,  G06F13/14 ,  G06F1/24 ,  G06F9/44 ,  G06F9/445 ,  G06F11/22 ,  G06F12/06 ,  G06F15/177 ,  G06K17/00

Abstract: A data processing system includes a central processing unit (CPU), a main memory unit, and input/output (I/O) sockets, each adapted to receive a selected one of a plurality of different and/or similar option cards. Each card contains (or is connected to) and controls a respective peripheral device, and each card is pre-wired with an ID value corresponding to its card type. Programmable option registers on each card store parameters such as address information, priority levels, and other system resource parameters. A setup routine, during initial power-on, retrieves and stores the appropriate parameters in the I/O cards and also in socket locations in main memory, one location being assigned to each input/output socket. Each socket location is adapted to hold the parameters associated with the card inserted in its respective socket and the card ID value. That portion of main memory containing the socket locations is adapted to maintain the parameter and ID information by means of battery power when system power fails or is disconnected, i.e., a non-volatile memory portion. Subsequent power-on routines are simplified by merely transferring parameters from the memory to the card registers if the status of all the sockets has not changed since the last power-down.