公开(公告)号：SG66439A1

公开(公告)日：1999-07-20

申请号：SG1998000511

申请日：1998-03-12

Applicant: IBM

Inventor： KAISER JOHN MICHAEL ,  MAULE WARREN EDWARD ,  MIRABELLA ROBERT DOMINICK ,  VICTOR DAVID WAYNE

IPC: G06F12/04 ,  G06F5/00 ,  G06F7/76 ,  G06F13/40 ,  G06F13/00

Abstract: To present a consistent image of storage facilities to components in Bi-modal Endian PowerPC system enviromnents, provision is made for transferring data between system components in the appropriate Endian format. Endian conversion function can be incorporated into the memory controller subsystem by adding byte-lane swapping logic on the inbound and outbound I/O data paths. With this structure, inbound data from the processor and memory bus will be converted to true Little Endian order before being sent to I/O devices. Likewise, true Little Endian data from I/O devices targeted for the processor or memory is modified to reflect the PowerPC Little Endian byte ordering convention.