PHASE SPLITTER WITH INTEGRATED LATCHING CIRCUIT

    公开(公告)号:DE3268802D1

    公开(公告)日:1986-03-13

    申请号:DE3268802

    申请日:1982-07-13

    Abstract: Disclosed is a phase splitter with integrated latch circuit, where the complementary output signals generated after an input signal applied to a true-complement generator are available directly without any load by the latch circuit, where upon a premature change of the input signal there is no undesired change of the previously set switching state or of the output signals, respectively, and where a simple clocking for functional control can be used. The advantages presented by the disclosed Phase splitter substantially consist in that the speed with which the complementary output signals are supplied is extremely high since the output signals are available directly, i.e. with only one stage delay, the latch circuit being non-conductive in the stationary state, and thus in a latching process does not have to be switched from one stage to the other, but only switched on.

    3.
    发明专利
    未知

    公开(公告)号:DE2951945A1

    公开(公告)日:1981-07-02

    申请号:DE2951945

    申请日:1979-12-22

    Abstract: After a controlled strong lowering of the word line potential for the purpose of addressing a cell, said potential is immediately recharged simultaneously increasing the potential on the N side of the two PNP injectors of the cell and causing the injector capacitances of the selected storage cells and the bit line capacitances to form a capacitive voltage divider, so that the bit lines connected thereto are recharged to different degrees by the different magnitudes of the injector capacitances. Thus, the differential signal formed on the bit lines is noticeably amplified by the supply of currents of different magnitudes.

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