公开(公告)号：US3659087A

公开(公告)日：1972-04-25

申请号：US3659087D

申请日：1970-09-30

Applicant: IBM

Inventor： GREEN RICHARD F ,  SCRAY EUGENE J JR ,  WILDER DONALD L

IPC: G01R13/34 ,  H03K5/01 ,  H03K5/13 ,  G06F15/20 ,  H03K3/64

CPC classification number: G01R13/345 ,  H03K5/01 ,  H03K5/13

Abstract: A digital pulse generator provides pulses of arbitrary width. The width of the pulses may be much less than the length of a clock cycle. Once the pulse generator has been adjusted it can produce many pulse patterns without further adjustment. A test system which provides extremely accurate information about a device under test incorporates the pulse generator as its primary element.

Abstract translation: 数字脉冲发生器提供任意宽度的脉冲。 脉冲的宽度可以远小于时钟周期的长度。 一旦调整了脉冲发生器，它就可以产生许多脉冲模式，无需进一步调整。 提供关于被测器件的非常精确的信息的测试系统将脉冲发生器作为其主要元件。

公开(公告)号：FR2345858A1

公开(公告)日：1977-10-21

申请号：FR7703511

申请日：1977-02-01

Applicant: IBM

Inventor： LEWIS SCOTT C ,  REDMAN THEODORE M ,  ROCK JAMES E ,  WILDER DONALD L

IPC: G11C11/417 ,  G11C7/00 ,  G11C11/34 ,  G11C11/4093 ,  G11C11/418 ,  H03K3/356 ,  H03K5/02 ,  H03K19/08 ,  H03K19/20

公开(公告)号：CA980920A

公开(公告)日：1975-12-30

申请号：CA164187

申请日：1973-02-19

Applicant: IBM

Inventor： RYAN WILLIAM J SR ,  THOMA NANDOR G ,  SCHIRMER EDWARD F ,  TOLLEY JAMES H ,  WILDER DONALD L

IPC: H01L21/00 ,  H01L21/683

Abstract: A system for handling an oriented array of objects, such as integrated circuit chips, includes a fixture in which the chips are held in place by vacuum means. A chip placement tube is capable of reciprocal motion normal to the plane of the fixture to move a chip unidirectionally from its position in the array for placement on a substrate. The system further includes means for positioning a substrate precisely with respect to a chip in the array to allow its direct placement from the array. This fixture and system allows the precise orientation and alignment of semiconductor chips in a wafer to be maintained for laser dicing and chip positioning on a substrate without requiring reorientation. When combined with testing and inspection apparatus and a suitable memory, the system further allows handling and processing of chips to be minimized.