公开(公告)号：GB2585599A

公开(公告)日：2021-01-13

申请号：GB202014410

申请日：2019-02-18

Applicant: IBM

Inventor： XIAOXIONG GU ,  WOORAM LEE ,  DUIXIAN LIU ,  CHRISTIAN WILHELMUS BAKS ,  ALBERTO VALDES-GARCIA

IPC: H01L25/00

Abstract: Techniques regarding a scalable phased array are provided. For example, various embodiments described herein can comprise a plurality of integrated circuits having respective flip chip pads, and an antenna-in-package substrate having a ball grid array terminal and a plurality of transmission lines. The plurality of transmission lines can be embedded within the antenna-in-package substrate and can operatively couple the respective flip chip pads to the ball grid array terminal. In one or more embodiments, a die can comprise the plurality of integrated circuits. Further, in one or more embodiments a combiner can also be embedded in the antenna-in-package substrate. The combiner can join the plurality of transmission lines.

公开(公告)号：GB2579526B

公开(公告)日：2020-12-23

申请号：GB202002833

申请日：2018-07-19

Applicant: IBM

Inventor： WOORAM LEE ,  TOLGA DINC ,  MARK FERRISS ,  BODHISATWA SADHU ,  ALBERTO VALDES GARCIA ,  DANIEL JOESPH FRIEDMAN

IPC: G01S7/03 ,  G01S7/282 ,  G01S7/35 ,  G01S13/02 ,  G01S13/10 ,  G01S13/28 ,  G01S13/32 ,  G01S13/34 ,  H03D7/14

公开(公告)号：GB2585599B

公开(公告)日：2021-12-15

申请号：GB202014410

申请日：2019-02-18

Applicant: IBM

Inventor： XIAOXIONG GU ,  WOORAM LEE ,  DUIXIAN LIU ,  CHRISTIAN WILHELMUS BAKS ,  ALBERTO VALDES-GARCIA

IPC: H01L25/00 ,  H01L21/00 ,  H01L21/36 ,  H01Q1/22 ,  H01Q21/06

Abstract: Techniques regarding a scalable phased array are provided. For example, various embodiments described herein can comprise a plurality of integrated circuits having respective flip chip pads, and an antenna-in-package substrate having a ball grid array terminal and a plurality of transmission lines. The plurality of transmission lines can be embedded within the antenna-in-package substrate and can operatively couple the respective flip chip pads to the ball grid array terminal. In one or more embodiments, a die can comprise the plurality of integrated circuits. Further, in one or more embodiments a combiner can also be embedded in the antenna-in-package substrate. The combiner can join the plurality of transmission lines.

公开(公告)号：GB2579526A

公开(公告)日：2020-06-24

申请号：GB202002833

申请日：2018-07-19

Applicant: IBM

Inventor： WOORAM LEE ,  TOLGA DINC ,  MARK FERRISS ,  BODHISATWA SADHU ,  ALBERTO VALDES GARCIA ,  DANIEL JOESPH FRIEDMAN

IPC: G01S7/03 ,  G01S7/282 ,  G01S7/35 ,  G01S13/02 ,  G01S13/10 ,  G01S13/28 ,  G01S13/32 ,  G01S13/34 ,  H03D7/14

Abstract: Techniques that facilitate reconfigurable transmission of a radar frequency signal are provided. In one example, a system includes a signal generator and a power modulator. The signal generator provides a radar waveform signal from a set of radar waveform signals. The power modulator divides a local oscillator signal associated with a first frequency and a first amplitude into a first local oscillator signal and a second local oscillator signal. The power modulator also generates a radio frequency signal associated with a second frequency and a second amplitude based on the radar waveform signal, the first local oscillator signal and the second local oscillator signal.