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    Package structures having integrated waveguides for high speed communications between package components
    3.
    发明专利
    Package structures having integrated waveguides for high speed communications between package components 未知

    公开(公告)号：GB2551298B

    公开(公告)日：2018-04-25

    申请号：GB201714391

    申请日：2016-02-15

    Applicant: IBM

    Inventor： BING DANG ,  DUIXIAN LIU ,  JEAN-OLIVIER PLOUCHART ,  ALBERTO VALDES-GARCIA

    IPC: H01L23/66 ,  H01L25/065 ,  H01P3/12 ,  H05K1/02

    Abstract: Embodiments include package structures having integrated waveguides to enable high data rate communication between package components. For example, a package structure includes a package substrate having an integrated waveguide, and first and second integrated circuit chips mounted to the package substrate. The first integrated circuit chip is coupled to the integrated waveguide using a first transmission line to waveguide transition, and the second integrated circuit chip is coupled to the integrated waveguide using a second transmission line to waveguide transition. The first and second integrated circuit chips are configured to communicate by transmitting signals using the integrated waveguide within the package carrier.

    Scalable phased array package
    4.
    发明专利
    Scalable phased array package 未知

    公开(公告)号：GB2585599B

    公开(公告)日：2021-12-15

    申请号：GB202014410

    申请日：2019-02-18

    Applicant: IBM

    Inventor： XIAOXIONG GU ,  WOORAM LEE ,  DUIXIAN LIU ,  CHRISTIAN WILHELMUS BAKS ,  ALBERTO VALDES-GARCIA

    IPC: H01L25/00 ,  H01L21/00 ,  H01L21/36 ,  H01Q1/22 ,  H01Q21/06

    Abstract: Techniques regarding a scalable phased array are provided. For example, various embodiments described herein can comprise a plurality of integrated circuits having respective flip chip pads, and an antenna-in-package substrate having a ball grid array terminal and a plurality of transmission lines. The plurality of transmission lines can be embedded within the antenna-in-package substrate and can operatively couple the respective flip chip pads to the ball grid array terminal. In one or more embodiments, a die can comprise the plurality of integrated circuits. Further, in one or more embodiments a combiner can also be embedded in the antenna-in-package substrate. The combiner can join the plurality of transmission lines.

    Package structures having integrated waveguides for high speed communications between package components
    5.
    发明专利
    Package structures having integrated waveguides for high speed communications between package components 未知

    公开(公告)号：GB2551298A

    公开(公告)日：2017-12-13

    申请号：GB201714391

    申请日：2016-02-15

    Applicant: IBM

    Inventor： BING DANG ,  DUIXIAN LIU ,  JEAN-OLIVER PLOUCHART ,  ALBERTO VALDES-GARCIA

    IPC: H01L23/66 ,  H01L25/065 ,  H01P3/12 ,  H05K1/02

    Abstract: A package structure includes a package substrate (130) having an integrated waveguide, and first and second integrated circuit chips (110,120) mounted to the package substrate (130). The first integrated circuit chip (110) is coupled to the integrated waveguide (132) using a first transmission line (116) to waveguide transition, and the second integrated circuit chip (120) is coupled to the integrated waveguide (132) using a second transmission line (126) to waveguide transition. The first and second integrated circuit chips (110,120) are configured to communicate by transmitting signals using the integrated waveguide (132) within the package carrier. The package structure enables high data rate communication between package components.

    Scalable phased array package
    6.
    发明专利
    Scalable phased array package 未知

    公开(公告)号：GB2585599A

    公开(公告)日：2021-01-13

    申请号：GB202014410

    申请日：2019-02-18

    Applicant: IBM

    Inventor： XIAOXIONG GU ,  WOORAM LEE ,  DUIXIAN LIU ,  CHRISTIAN WILHELMUS BAKS ,  ALBERTO VALDES-GARCIA

    IPC: H01L25/00

    Abstract: Techniques regarding a scalable phased array are provided. For example, various embodiments described herein can comprise a plurality of integrated circuits having respective flip chip pads, and an antenna-in-package substrate having a ball grid array terminal and a plurality of transmission lines. The plurality of transmission lines can be embedded within the antenna-in-package substrate and can operatively couple the respective flip chip pads to the ball grid array terminal. In one or more embodiments, a die can comprise the plurality of integrated circuits. Further, in one or more embodiments a combiner can also be embedded in the antenna-in-package substrate. The combiner can join the plurality of transmission lines.

    Wireless communications package with integrated antenna array
    7.
    发明专利
    Wireless communications package with integrated antenna array 未知

    公开(公告)号：GB2559001A

    公开(公告)日：2018-07-25

    申请号：GB201718932

    申请日：2017-11-16

    Applicant: IBM ,  ERICSSON AB

    Inventor： DUIXIAN LIU ,  XIAOXIONG GU ,  CHRISTIAN WILHELMUS BAKS ,  ALBERTO VALDES GARCIA ,  DANIEL JOSEPH FRIEDMAN ,  JOAKIM HALLIN ,  OLA RAGNAR TAGEMAN

    IPC: H01Q21/06 ,  H01Q1/22 ,  H01Q23/00

    Abstract: An antenna package 105, which may include an RFIC 102, includes a multilayer substrate 110. The package includes an antenna array 152, which may be formed on a cover 150 of the package, antenna feed lines 112,114 and resistive transmission lines (352,354 fig. 3B). The antenna array includes active antenna elements (320 fig.3A) and dummy antenna elements (350 fig.3A) surrounding the active elements. Each active element is coupled to an antenna feed line and each dummy antenna element is coupled to a resistive transmission line. Each resistive transmission line extends through the multilayer substrate and is terminated in a same metallization layer of the multilayer package substrate. Dual polarisation may be facilitated by orthogonal feeds (201,203 fig. 2A) whilst ground planes and conductive vias (648 fig. 6B) may be used to provide isolation. A connector package (542 fig. 5) may be used instead of the package cover in order to facilitate testing of the RFIC or to connect to an external antenna array. The package may form a wireless communication package.

    Integrated antenna array packaging structures and methods
    8.
    发明专利
    Integrated antenna array packaging structures and methods 未知

    公开(公告)号：GB2587106B

    公开(公告)日：2022-05-18

    申请号：GB202016144

    申请日：2019-03-05

    Applicant: IBM

    Inventor： XIAOXIONG GU ,  DUIXIAN LIU ,  ALBERTO VALDES GARCIA ,  CHRISTIAN WILHELMUS BAKS

    IPC: H01Q1/22 ,  H01Q21/06

    Abstract: An apparatus includes an antenna array package cover comprising a radiating surface, a mating surface disposed opposite the radiating surface, and an array of antenna array sub-patterns wherein each antenna array sub-pattern comprises at least one antenna element. The antenna array package also includes an array of sub-pattern interface packages mated to the mating surface of the antenna array package cover. Each sub-pattern interface package of the array of sub-pattern interface packages comprises a package carrier, a sub-pattern integrated circuit electrically and mechanically coupled to the package carrier, and a set of interface lines corresponding to the antenna elements of the antenna array sub-pattern that corresponds to the sub-pattern interface package. Methods for mounting the above apparatus into a host circuit are also disclosed herein.

    Integrated antenna array packaging structures and methods
    9.
    发明专利
    Integrated antenna array packaging structures and methods 未知

    公开(公告)号：GB2587106A

    公开(公告)日：2021-03-17

    申请号：GB202016144

    申请日：2019-03-05

    Applicant: IBM

    Inventor： XIAOXIONG GU ,  DUIXIAN LIU ,  ALBERTO VALDES GARCIA ,  CHRISTIAN WILHELMUS BAKS

    IPC: H01Q1/22

    Abstract: An apparatus includes an antenna array package cover comprising a radiating surface, a mating surface disposed opposite the radiating surface, and an array of antenna array sub-patterns wherein each antenna array sub-pattern comprises at least one antenna element. The antenna array package also includes an array of sub-pattern interface packages mated to the mating surface of the antenna array package cover. Each sub-pattern interface package of the array of sub-pattern interface packages comprises a package carrier, a sub-pattern integrated circuit electrically and mechanically coupled to the package carrier, and a set of interface lines corresponding to the antenna elements of the antenna array sub-pattern that corresponds to the sub-pattern interface package. Methods for mounting the above apparatus into a host circuit are also disclosed herein.

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