公开(公告)号：GB2585599A

公开(公告)日：2021-01-13

申请号：GB202014410

申请日：2019-02-18

Applicant: IBM

Inventor： XIAOXIONG GU ,  WOORAM LEE ,  DUIXIAN LIU ,  CHRISTIAN WILHELMUS BAKS ,  ALBERTO VALDES-GARCIA

IPC: H01L25/00

Abstract: Techniques regarding a scalable phased array are provided. For example, various embodiments described herein can comprise a plurality of integrated circuits having respective flip chip pads, and an antenna-in-package substrate having a ball grid array terminal and a plurality of transmission lines. The plurality of transmission lines can be embedded within the antenna-in-package substrate and can operatively couple the respective flip chip pads to the ball grid array terminal. In one or more embodiments, a die can comprise the plurality of integrated circuits. Further, in one or more embodiments a combiner can also be embedded in the antenna-in-package substrate. The combiner can join the plurality of transmission lines.

公开(公告)号：GB2551298B

公开(公告)日：2018-04-25

申请号：GB201714391

申请日：2016-02-15

Applicant: IBM

Inventor： BING DANG ,  DUIXIAN LIU ,  JEAN-OLIVIER PLOUCHART ,  ALBERTO VALDES-GARCIA

IPC: H01L23/66 ,  H01L25/065 ,  H01P3/12 ,  H05K1/02

Abstract: Embodiments include package structures having integrated waveguides to enable high data rate communication between package components. For example, a package structure includes a package substrate having an integrated waveguide, and first and second integrated circuit chips mounted to the package substrate. The first integrated circuit chip is coupled to the integrated waveguide using a first transmission line to waveguide transition, and the second integrated circuit chip is coupled to the integrated waveguide using a second transmission line to waveguide transition. The first and second integrated circuit chips are configured to communicate by transmitting signals using the integrated waveguide within the package carrier.

公开(公告)号：GB2585599B

公开(公告)日：2021-12-15

申请号：GB202014410

申请日：2019-02-18

Applicant: IBM

Inventor： XIAOXIONG GU ,  WOORAM LEE ,  DUIXIAN LIU ,  CHRISTIAN WILHELMUS BAKS ,  ALBERTO VALDES-GARCIA

IPC: H01L25/00 ,  H01L21/00 ,  H01L21/36 ,  H01Q1/22 ,  H01Q21/06

Abstract: Techniques regarding a scalable phased array are provided. For example, various embodiments described herein can comprise a plurality of integrated circuits having respective flip chip pads, and an antenna-in-package substrate having a ball grid array terminal and a plurality of transmission lines. The plurality of transmission lines can be embedded within the antenna-in-package substrate and can operatively couple the respective flip chip pads to the ball grid array terminal. In one or more embodiments, a die can comprise the plurality of integrated circuits. Further, in one or more embodiments a combiner can also be embedded in the antenna-in-package substrate. The combiner can join the plurality of transmission lines.

公开(公告)号：GB2551298A

公开(公告)日：2017-12-13

申请号：GB201714391

申请日：2016-02-15

Applicant: IBM

Inventor： BING DANG ,  DUIXIAN LIU ,  JEAN-OLIVER PLOUCHART ,  ALBERTO VALDES-GARCIA

IPC: H01L23/66 ,  H01L25/065 ,  H01P3/12 ,  H05K1/02

Abstract: A package structure includes a package substrate (130) having an integrated waveguide, and first and second integrated circuit chips (110,120) mounted to the package substrate (130). The first integrated circuit chip (110) is coupled to the integrated waveguide (132) using a first transmission line (116) to waveguide transition, and the second integrated circuit chip (120) is coupled to the integrated waveguide (132) using a second transmission line (126) to waveguide transition. The first and second integrated circuit chips (110,120) are configured to communicate by transmitting signals using the integrated waveguide (132) within the package carrier. The package structure enables high data rate communication between package components.