公开(公告)号：JPH08241963A

公开(公告)日：1996-09-17

申请号：JP2267895

申请日：1995-02-10

Applicant: IBM

Inventor： MIYATAKE HISATADA ,  SUNANAGA TOSHIO ,  KITAMURA TSUNEJI ,  YAMAMOTO MASAAKI

IPC: G11C11/401 ,  G11C5/14 ,  H01L21/8242 ,  H01L27/108

Abstract: PURPOSE: To provide a reliable high-density semiconductor integrated circuit device with high-speed operation by forming a DRAM macrocell and a logical cell in a common chip. CONSTITUTION: A DRAM macroscopic cell 14 is formed on the same cell as a logical cell. The DRAM macroscopic cell 14 includes a guard ring 26 of a conductive type opposite to that of a semiconductor substrate, a memory cell alley 42 formed in a well in the guard ring 26, a power line 34, a grounding line 36, and a bypass capacitor 70 joined between the power line 34 and the grounding line 36. The power line 36 and a logical-cell power line are connected to different power pads, while the grounding line 36 and a logic-cell grounding line are connected to a common grounding line or to grounding lines provided near to each other and connected with a low impedance line.