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公开(公告)号：CA2092630C
公开(公告)日：1998-12-22
申请号：CA2092630
申请日：1993-03-12
Applicant: IBM
Inventor： LUCAS BRUCE DAVID , MACINNIS ALEXANDER GARLAND , YOSIM PAUL STEWART
Abstract: This invention provides a method of and apparatus for compressing digital video color signals derived from a natural image and generating display signals for a color image composed of pixels derived from the compressed signals in which digital color signals representative of color depth intensities of three colors for each pixel to be displayed, each color signal having at least four bits representing the color intensity of a corresponding color for a corresponding pixel and arranged from most to least significant bits, are received; a digital dither signal for each pixel to be displayed is generated; a selected number of the most significant bits of each received color signal are summed with the corresponding generated dither signal; a selected number of the least significant bits of the summed color and dither signals are discarded to compress the corresponding received color signal; the compressed color signals related to a common pixel are concatenated to generate a digital output signal having a predetermined bit length less than the summed bit lengths of the received digital color signals and representative of the depth intensities of three colors for the common pixel; and analog display driver signals representative of the color intensities of pixels to be displayed are generated by selecting from a color lookup table stored in a digital to analog converter analog signals corresponding to the stored output signals.
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公开(公告)号：DE602005014980D1
公开(公告)日：2009-07-30
申请号：DE602005014980
申请日：2005-04-04
Applicant: IBM
Inventor： YOSIM PAUL STEWART , RASHID IRFAN
Abstract: Methods and apparatus that allow restricted access to internal registers of an integrated circuit (IC) device via an interface are provided. Unrestricted access to internal registers via the interface may be allowed during a manufacturing process to allow device testing. After such testing is complete, the device may be placed in a restricted access mode, for example, by blowing a master "lock" fuse, to prevent unrestricted access to one or more of the internal registers via the interface. However, full or partial access to the internal registers may still be provided via an access code or "combination lock" allowing the master fuse lock, in effect, to be bypassed.
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公开(公告)号：DE3065520D1
公开(公告)日：1983-12-15
申请号：DE3065520
申请日：1980-07-10
Applicant: IBM
IPC: H04N1/387 , G06K9/32 , G06T1/00 , H04N1/00 , H04N1/047 , H04N1/10 , H04N1/113 , H04N1/19 , H04N1/193
Abstract: Deformities in electronic images produced by a multiple array scanner 10 are corrected by using the scanner to generate an electronic image of a reference pattern 62 disposed at the document platen of the scanner, storing that electronic image in a memory 72, producing skew, misalignment and misabutment signals by analysing the stored image and using the correction signals to produce a corrected electronic image of the reference pattern and to correct the electronic images of originals subsequently scanned by the scanner. The reference pattern consists of a horizontal line which is used to correct deformities in the images due to misalignment and skew associated with the arrays and a vertical line which is used to correct deformities in the images due to misabutment between the arrays. A pointer system 74, 76 associated with the memory is used to identify a sequence of locations in the memory.
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公开(公告)号：AT68621T
公开(公告)日：1991-11-15
申请号：AT85106931
申请日：1985-06-05
Applicant: IBM
Inventor： RACKLEY DARWIN PRESTON , SAENZ JESUS ANDRES , YOSIM PAUL STEWART
Abstract: A digital display system includes a monitor arranged to receive digital display data and synchronising signals to develop displays on a cathode ray tube. The monitor is switched between different line structure and/or colour definition modes in response to the polarity of one of the vertical or horizontal synchronising signals trains. A circuit receives this train to provide control signals to the horizontal time base and/or a colour signal code converter. The time base control signal, in accordance with its binary value, controls the frequency of the time base. The colour converter, in response to the control signals, either passes colour signals received in parallel over six input lines without change to the cathode ray tube drive circuits or converts colour signals on four of the input lines to output signals on the six lines to the drive circuits.
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公开(公告)号：GB2162026B
公开(公告)日：1987-10-28
申请号：GB8513016
申请日：1985-05-23
Applicant: IBM
Inventor： RACKLEY DARWIN PRESTON , SAENZ JESUS ANDRES , YOSIM PAUL STEWART
IPC: G09G5/18 , G06F3/153 , G09G1/16 , G09G1/28 , G09G5/00 , G09G5/02 , G09G5/04 , G09G5/36 , H04N3/27
Abstract: A digital display system includes a monitor arranged to receive digital display data and synchronising signals to develop displays on a cathode ray tube. The monitor is switched between different line structure and/or colour definition modes in response to the polarity of one of the vertical or horizontal synchronising signals trains. A circuit receives this train to provide control signals to the horizontal time base and/or a colour signal code converter. The time base control signal, in accordance with its binary value, controls the frequency of the time base. The colour converter, in response to the control signals, either passes colour signals received in parallel over six input lines without change to the cathode ray tube drive circuits or converts colour signals on four of the input lines to output signals on the six lines to the drive circuits.
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Patent Agency Ranking
公开(公告)号：BR8503045A
公开(公告)日：1986-03-11
申请号：BR8503045
申请日：1985-06-25
Applicant: IBM
Inventor： RACKLEY DARWIN PRESTON , SAENZ JESUS ANDRES , YOSIM PAUL STEWART
Abstract: A digital display system includes a monitor arranged to receive digital display data and synchronising signals to develop displays on a cathode ray tube. The monitor is switched between different line structure and/or colour definition modes in response to the polarity of one of the vertical or horizontal synchronising signals trains. A circuit receives this train to provide control signals to the horizontal time base and/or a colour signal code converter. The time base control signal, in accordance with its binary value, controls the frequency of the time base. The colour converter, in response to the control signals, either passes colour signals received in parallel over six input lines without change to the cathode ray tube drive circuits or converts colour signals on four of the input lines to output signals on the six lines to the drive circuits.
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公开(公告)号：HK23890A
公开(公告)日：1990-04-06
申请号：HK23890
申请日：1990-03-29
Applicant: IBM
Inventor： RACKLEY DARWIN PRESTON , SAENZ JESUS ANDRES , YOSIM PAUL STEWART
IPC: G09G5/18 , G06F3/153 , G09G1/16 , G09G1/28 , G09G5/00 , G09G5/02 , G09G5/04 , G09G5/36 , H04N3/27
Abstract: A digital display system includes a monitor arranged to receive digital display data and synchronising signals to develop displays on a cathode ray tube. The monitor is switched between different line structure and/or colour definition modes in response to the polarity of one of the vertical or horizontal synchronising signals trains. A circuit receives this train to provide control signals to the horizontal time base and/or a colour signal code converter. The time base control signal, in accordance with its binary value, controls the frequency of the time base. The colour converter, in response to the control signals, either passes colour signals received in parallel over six input lines without change to the cathode ray tube drive circuits or converts colour signals on four of the input lines to output signals on the six lines to the drive circuits.
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公开(公告)号：GB2162026A
公开(公告)日：1986-01-22
申请号：GB8513016
申请日：1985-05-23
Applicant: IBM
Inventor： RACKLEY DARWIN PRESTON , SAENZ JESUS ANDRES , YOSIM PAUL STEWART
IPC: G09G5/18 , G06F3/153 , G09G1/16 , G09G1/28 , G09G5/00 , G09G5/02 , G09G5/04 , G09G5/36 , H04N3/27
Abstract: A digital display system includes a monitor arranged to receive digital display data and synchronising signals to develop displays on a cathode ray tube. The monitor is switched between different line structure and/or colour definition modes in response to the polarity of one of the vertical or horizontal synchronising signals trains. A circuit receives this train to provide control signals to the horizontal time base and/or a colour signal code converter. The time base control signal, in accordance with its binary value, controls the frequency of the time base. The colour converter, in response to the control signals, either passes colour signals received in parallel over six input lines without change to the cathode ray tube drive circuits or converts colour signals on four of the input lines to output signals on the six lines to the drive circuits.
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公开(公告)号：PH26752A
公开(公告)日：1992-09-28
申请号：PH32289
申请日：1985-05-17
Applicant: IBM
Inventor： RACKLEY DARWIN PRESTON , YOSIM PAUL STEWART , SAENZ JESUS ANDRES
Abstract: A digital display system includes a monitor arranged to receive digital display data and synchronising signals to develop displays on a cathode ray tube. The monitor is switched between different line structure and/or colour definition modes in response to the polarity of one of the vertical or horizontal synchronising signals trains. A circuit receives this train to provide control signals to the horizontal time base and/or a colour signal code converter. The time base control signal, in accordance with its binary value, controls the frequency of the time base. The colour converter, in response to the control signals, either passes colour signals received in parallel over six input lines without change to the cathode ray tube drive circuits or converts colour signals on four of the input lines to output signals on the six lines to the drive circuits.
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公开(公告)号：DE3584403D1
公开(公告)日：1991-11-21
申请号：DE3584403
申请日：1985-06-05
Applicant: IBM
Inventor： RACKLEY DARWIN PRESTON , SAENZ JESUS ANDRES , YOSIM PAUL STEWART
Abstract: A digital display system includes a monitor arranged to receive digital display data and synchronising signals to develop displays on a cathode ray tube. The monitor is switched between different line structure and/or colour definition modes in response to the polarity of one of the vertical or horizontal synchronising signals trains. A circuit receives this train to provide control signals to the horizontal time base and/or a colour signal code converter. The time base control signal, in accordance with its binary value, controls the frequency of the time base. The colour converter, in response to the control signals, either passes colour signals received in parallel over six input lines without change to the cathode ray tube drive circuits or converts colour signals on four of the input lines to output signals on the six lines to the drive circuits.
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