DYNAMIC MANAGEMENT OF SNOOP GRANULARITY FOR A COHERENT ASYNCHRONOUS DMA CACHE

    公开(公告)号:CA2125218A1

    公开(公告)日:1995-03-21

    申请号:CA2125218

    申请日:1994-06-06

    Applicant: IBM

    Abstract: DYNAMIC MANAGEMENT OF SNOOP GRANULARITY FOR A COHERENT ASYNCHRONOUS DMA CACHE A system and method dynamically changes the snoop comparison granularity between a sector and a page, depending upon the state (active or inactive) of a direct memory access (DMA) I/O device which is writing to a device on the system bus asynchronously when compared to the CPU clock. By using page address granularity, erroneous snoop hits will not occur, since potentially invalid sector addresses are not used during the snoop comparison. Sector memory addresses may be in a transition state at the time when the CPU clock determines a snoop comparison is to occur, because this sector address has been requested by a device operating asynchronously with the CPU clock. Once the asynchronous device becomes inactive the system dynamically returns to a page and sector address snoop comparison granularity.

    Scalable System Interrupt Structure for a Multiprocessing System

    公开(公告)号:CA2123447A1

    公开(公告)日:1995-03-21

    申请号:CA2123447

    申请日:1994-05-12

    Applicant: IBM

    Abstract: An interrupt subsystem within a data processing system is scalable from low-end uniprocessor systems to high-end multi-processor (MP) systems. This interrupt subsystem provides for queuing of interrupts from many sources, and for queuing of interrupts to the best processor in a multi-processor system. The external interrupt mechanism is separated into two layers, an interrupt routing layer and an interrupt presentation layer. The interrupt routing layer routes the interrupt conditions to the appropriate instance of an interrupt management area within the interrupt presentation layer. The interrupt presentation layer communicates the interrupt source to the system software which is to service/process the interrupt. By providing two layers within the interrupt subsystem, application or system software can be written which is independent from the types or sources of interrupts. The interrupt routing layer hides the details of a particular hardware implementation from the software. The interrupt presentation layer interfaces to the system and/or application software, and provides hardware independent functionality.

Patent Agency Ranking