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公开(公告)号:DE69419680T2
公开(公告)日:2000-03-02
申请号:DE69419680
申请日:1994-09-15
Applicant: IBM
Inventor: ARNDT RICHARD LOUIS , NICHOLSON JAMES OTTO , SILHA EDWARD JOHN , THURBER STEVEN MARK , YOUNGS AMY MAY
Abstract: An interrupt subsystem within a data processing system is scalable from low-end uniprocessor systems to high-end multi-processor (MP) systems. This interrupt subsystem provides for queuing of interrupts from many sources, and for queuing of interrupts to the best processor in a multi-processor system. The external interrupt mechanism is separated into two layers, an interrupt routing layer and an interrupt presentation layer. The interrupt routing layer routes the interrupt conditions to the appropriate instance of an interrupt management area within the interrupt presentation layer. The interrupt presentation layer communicates the interrupt source to the system software which is to service/process the interrupt. By providing two layers within the interrupt subsystem, application or system software can be written which is independent from the types or sources of interrupts. The interrupt routing layer hides the details of a particular hardware implementation from the software. The interrupt presentation layer interfaces to the system and/or application software, and provides hardware independent functionality.
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公开(公告)号:DE69419680D1
公开(公告)日:1999-09-02
申请号:DE69419680
申请日:1994-09-15
Applicant: IBM
Inventor: ARNDT RICHARD LOUIS , NICHOLSON JAMES OTTO , SILHA EDWARD JOHN , THURBER STEVEN MARK , YOUNGS AMY MAY
Abstract: An interrupt subsystem within a data processing system is scalable from low-end uniprocessor systems to high-end multi-processor (MP) systems. This interrupt subsystem provides for queuing of interrupts from many sources, and for queuing of interrupts to the best processor in a multi-processor system. The external interrupt mechanism is separated into two layers, an interrupt routing layer and an interrupt presentation layer. The interrupt routing layer routes the interrupt conditions to the appropriate instance of an interrupt management area within the interrupt presentation layer. The interrupt presentation layer communicates the interrupt source to the system software which is to service/process the interrupt. By providing two layers within the interrupt subsystem, application or system software can be written which is independent from the types or sources of interrupts. The interrupt routing layer hides the details of a particular hardware implementation from the software. The interrupt presentation layer interfaces to the system and/or application software, and provides hardware independent functionality.
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公开(公告)号:AT191803T
公开(公告)日:2000-04-15
申请号:AT94306613
申请日:1994-09-08
Applicant: IBM
Inventor: ARIMILLI RAVI KUMAR , GREGOIRE DENNIS GERARD , YOUNGS AMY MAY
IPC: G06F12/08
Abstract: A data processing system and method dynamically changes the snoop comparison granularity between a sector and a page, depending upon the state (active or inactive) of a direct memory access (DMA) I/O device 20, 22 which is writing to a device 7 on the system bus 5 asynchronously when compared to the CPU clock 1. By using page address granularity, erroneous snoop hits will not occur, since potentially invalid sector addresses are not used during the snoop comparison. Sector memory addresses may be in a transition state at the time when the CPU clock determines a snoop comparison is to occur, because this sector address has been requested by a device operating asynchronously with the CPU clock. Once the asynchronous device becomes inactive the system dynamically returns to a page and sector address snoop comparison granularity.
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公开(公告)号:DE69423938T2
公开(公告)日:2000-10-12
申请号:DE69423938
申请日:1994-09-08
Applicant: IBM
Inventor: ARIMILLI RAVI KUMAR , GREGOIRE DENNIS GERARD , YOUNGS AMY MAY
IPC: G06F12/08
Abstract: A data processing system and method dynamically changes the snoop comparison granularity between a sector and a page, depending upon the state (active or inactive) of a direct memory access (DMA) I/O device 20, 22 which is writing to a device 7 on the system bus 5 asynchronously when compared to the CPU clock 1. By using page address granularity, erroneous snoop hits will not occur, since potentially invalid sector addresses are not used during the snoop comparison. Sector memory addresses may be in a transition state at the time when the CPU clock determines a snoop comparison is to occur, because this sector address has been requested by a device operating asynchronously with the CPU clock. Once the asynchronous device becomes inactive the system dynamically returns to a page and sector address snoop comparison granularity.
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公开(公告)号:ES2144488T3
公开(公告)日:2000-06-16
申请号:ES94306613
申请日:1994-09-08
Applicant: IBM
Inventor: ARIMILLI RAVI KUMAR , GREGOIRE DENNIS GERARD , YOUNGS AMY MAY
IPC: G06F12/08
Abstract: A data processing system and method dynamically changes the snoop comparison granularity between a sector and a page, depending upon the state (active or inactive) of a direct memory access (DMA) I/O device 20, 22 which is writing to a device 7 on the system bus 5 asynchronously when compared to the CPU clock 1. By using page address granularity, erroneous snoop hits will not occur, since potentially invalid sector addresses are not used during the snoop comparison. Sector memory addresses may be in a transition state at the time when the CPU clock determines a snoop comparison is to occur, because this sector address has been requested by a device operating asynchronously with the CPU clock. Once the asynchronous device becomes inactive the system dynamically returns to a page and sector address snoop comparison granularity.
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公开(公告)号:DE69423938D1
公开(公告)日:2000-05-18
申请号:DE69423938
申请日:1994-09-08
Applicant: IBM
Inventor: ARIMILLI RAVI KUMAR , GREGOIRE DENNIS GERARD , YOUNGS AMY MAY
IPC: G06F12/08
Abstract: A data processing system and method dynamically changes the snoop comparison granularity between a sector and a page, depending upon the state (active or inactive) of a direct memory access (DMA) I/O device 20, 22 which is writing to a device 7 on the system bus 5 asynchronously when compared to the CPU clock 1. By using page address granularity, erroneous snoop hits will not occur, since potentially invalid sector addresses are not used during the snoop comparison. Sector memory addresses may be in a transition state at the time when the CPU clock determines a snoop comparison is to occur, because this sector address has been requested by a device operating asynchronously with the CPU clock. Once the asynchronous device becomes inactive the system dynamically returns to a page and sector address snoop comparison granularity.
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