公开(公告)号：US3723200A

公开(公告)日：1973-03-27

申请号：US3723200D

申请日：1970-01-26

Applicant: IBM

Inventor： CASTRUCCI P ,  GROCHOWSKI E ,  HESS M ,  ZACHOS E

IPC: H01L21/761 ,  H01L7/00 ,  H01L19/00

CPC classification number: H01L21/761 ,  Y10S148/037 ,  Y10S148/085 ,  Y10S148/145

Abstract: A MONOLITHIC MICROCIRCUIT FABRICATION METHOD EMPLOYING AN OPTIMIZED MIDDLE ISOLATION TECHNIQUE FOR PRODUCING SPECIFIC VERTICAL DIFFUSION WALLS OF MINIMUM CRITICAL HORIZONTAL DIMENSIONS IS DISCLOSED TO FACILITATE MAXIMUM DENSITY OF ELECTRICALLY ISOLATED MICROCIRCUIT COMPONENTS. A FIRST EPITAXIAL LAYER IS GROWN ON A SEMICONDUCTOR SUBTRATE AND REGIONS OF ISOLATION IMPURITIES ARE PLACED THEREIN AT DESIRED LOCATIONS. A SECOND EPITAXIAL LAYER IS GROWN OVER THE FIRST EPITAXIAL LAYER (WHILE THE IMPURITIES OUT-DIFFUSE INTO BOTH EPITAXIAL LAYERS) UNTIL THE NON-ISOLATES THICKNESS REMAINING IN THE FIRST EPITAXIAL LAYER BECOMES EQUAL TO THE NON-ISOLATED THICKNESS REMAINING IN THE SECOND EPITAXIAL LAYER. SUBSEQUENT CONVENTIONAL HEAT TREATMENT STEPS SUCH AS ARE REQUIRED FOR THE OXIDATION AND DIFFUSION CYCLES OF TYPICAL MICROCIRCUIT COMPONENTS CONTINUE THE OUT-DIFFUSION OF THE IMPURITY REGIONS SO AS TO FORM COMPLETED VERTICAL ISOLATION WALLS BETWEEN SAID COMPONENTS.

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