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    Integrated circuit design adapted to interconnection
    1.
    发明专利
    Integrated circuit design adapted to interconnection 审中-公开
    集成电路设计适用于互连

    公开(公告)号：JP2005158075A

    公开(公告)日：2005-06-16

    申请号：JP2004339631

    申请日：2004-11-24

    Applicant: Internatl Business Mach Corp ,  インターナショナル・ビジネス・マシーンズ・コーポレーションInternational Business Maschines Corporation

    Inventor： GOREN DAVID ,  GORDIN RACHEL ,  ZELIKSON MICHAEL

    IPC: G06F17/50 ,  G06F9/455 ,  H01L21/82

    CPC classification number: G06F17/5036

    Abstract: PROBLEM TO BE SOLVED: To provide an IC design method for accommodating crossing line effects. SOLUTION: A preliminary design of the integrated circuit is defined and critical interconnect lines in a preliminary design are identified (21). Further, critical interconnect lines which are affected by the crossing lines in the preliminary design are identified (22) and a transmission line model is defined to represent each critical interconnect line (23). A layout design of the integrated circuit comprising circuit components and parameters thereof is then defined by using the preliminary design and the transmission line model for each critical interconnect line (24). Next, component parameters are extracted from the layout design 25 (26) and the extracted components parameters are used for the simulation of the design (27). During this design process, an environment terminal is provided every transmission line model representing critical interconnect lines affected by a crossing line. COPYRIGHT: (C)2005,JPO&NCIPI

    Abstract translation: 要解决的问题：提供一种用于适应交叉线效应的IC设计方法。

    解决方案：定义了集成电路的初步设计，并确定了初步设计中的关键互连线（21）。 此外，识别在初步设计中受交叉线影响的关键互连线（22），并且传输线模型被定义为表示每个关键互连线（23）。 然后通过使用每个关键互连线（24）的初步设计和传输线模型来定义包括电路部件及其参数的集成电路的布局设计。 接下来，从布局设计25（26）中提取组件参数，并且提取的组件参数用于设计的仿真（27）。 在该设计过程中，为每个传输线模型提供环境终端，表示受交叉线影响的关键互连线。 版权所有（C）2005，JPO＆NCIPI

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